diff mbox series

[4/4] arm64: dts: mediatek: mt8195: Add AP domain temperature thresholds

Message ID 20230307154524.118541-5-bchihi@baylibre.com
State New
Headers
Series Add LVTS's AP thermal domain support for mt8195 |

Commit Message

Balsam CHIHI March 7, 2023, 3:45 p.m. UTC 
  From: Balsam CHIHI <bchihi@baylibre.com>

Specify the targeted temperature thresholds.

Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 +++++++++++++++++++-----
 1 file changed, 72 insertions(+), 18 deletions(-)

Comments

AngeloGioacchino Del Regno March 8, 2023, 9:17 a.m. UTC | #1 
Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> From: Balsam CHIHI <bchihi@baylibre.com>
> 
> Specify the targeted temperature thresholds.

You're introducing the thermal zones and *then* fixing them in this commit.
To be honest, this doesn't make a lot of sense...

Please squash this commit with
arm64: dts: mediatek: mt8195: Add AP domain thermal zones

P.S.: After squashing.. looks good.

Thanks,
Angelo
Balsam CHIHI March 8, 2023, 4:01 p.m. UTC | #2 
On Wed, Mar 8, 2023 at 10:17 AM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Il 07/03/23 16:45, bchihi@baylibre.com ha scritto:
> > From: Balsam CHIHI <bchihi@baylibre.com>
> >
> > Specify the targeted temperature thresholds.
>
> You're introducing the thermal zones and *then* fixing them in this commit.
> To be honest, this doesn't make a lot of sense...
>
> Please squash this commit with
> arm64: dts: mediatek: mt8195: Add AP domain thermal zones
>
> P.S.: After squashing.. looks good.

Hi Angelo,

Thanks again for the review.
OK, I will squash them in the new series.

Best regards,
Balsam

>
> Thanks,
> Angelo
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index b066d1eab1dc..0dab67d283a6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2654,11 +2654,17 @@  map0 {
 		};
 
 		vpu0-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_VPU0>;
 
 			trips {
+				vpu0_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				vpu0_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2668,11 +2674,17 @@  vpu0_crit: trip-crit {
 		};
 
 		vpu1-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_VPU1>;
 
 			trips {
+				vpu1_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				vpu1_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2682,11 +2694,17 @@  vpu1_crit: trip-crit {
 		};
 
 		gpu0-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_GPU0>;
 
 			trips {
+				gpu0_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				gpu0_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2696,11 +2714,17 @@  gpu0_crit: trip-crit {
 		};
 
 		gpu1-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_GPU1>;
 
 			trips {
+				gpu1_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				gpu1_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2710,11 +2734,17 @@  gpu1_crit: trip-crit {
 		};
 
 		vdec-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_VDEC>;
 
 			trips {
+				vdec_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				vdec_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2724,11 +2754,17 @@  vdec_crit: trip-crit {
 		};
 
 		img-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_IMG>;
 
 			trips {
+				img_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				img_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2738,11 +2774,17 @@  img_crit: trip-crit {
 		};
 
 		infra-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_INFRA>;
 
 			trips {
+				infra_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				infra_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2752,11 +2794,17 @@  infra_crit: trip-crit {
 		};
 
 		cam0-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_CAM0>;
 
 			trips {
+				cam0_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cam0_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;
@@ -2766,11 +2814,17 @@  cam0_crit: trip-crit {
 		};
 
 		cam1-thermal {
-			polling-delay = <0>;
-			polling-delay-passive = <0>;
+			polling-delay = <1000>;
+			polling-delay-passive = <250>;
 			thermal-sensors = <&lvts_ap MT8195_AP_CAM1>;
 
 			trips {
+				cam1_alert: trip-alert {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
 				cam1_crit: trip-crit {
 					temperature = <100000>;
 					hysteresis = <2000>;