Message ID | 20230308125300.58244-18-dev@pschenker.ch |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q17-20020a656851000000b004fd10490f3dsi6580054pgt.251.2023.03.08.05.15.48; Wed, 08 Mar 2023 05:16:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@pschenker.ch header.s=20220412 header.b=Z17z0InB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=pschenker.ch Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231575AbjCHNBc (ORCPT <rfc822;toshivichauhan@gmail.com> + 99 others); Wed, 8 Mar 2023 08:01:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231451AbjCHNAg (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 8 Mar 2023 08:00:36 -0500 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [IPv6:2001:1600:4:17::bc08]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 903EEC2219 for <linux-kernel@vger.kernel.org>; Wed, 8 Mar 2023 04:59:57 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgJ5zVGzMrS9Q; Wed, 8 Mar 2023 13:53:16 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgJ2T5czMslrx; Wed, 8 Mar 2023 13:53:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279996; bh=aExLQ6B+SPPPLHo1PHQOw+NlQL8dDHzonnhZWoJIBHs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Z17z0InBhcSGaQbYoUypBNPqiYFRUVpPf9Y5drop92G3smRvLIIFMRdYVJjeNac/Y LepbB9iAMpwZxWSBnSWhMA264fsWIlI62jo/zgdxVxDEQJWprDtz6t2LO1nVT7j5+h wKwEdJp40xhv7p0hr2GXEksQRq4H4EuufwqrL9Aw= From: Philippe Schenker <dev@pschenker.ch> To: devicetree@vger.kernel.org, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de> Cc: NXP Linux Team <linux-imx@nxp.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh+dt@kernel.org>, Pengutronix Kernel Team <kernel@pengutronix.de>, Frank Rowand <frowand.list@gmail.com>, linux-arm-kernel@lists.infradead.org, Fabio Estevam <festevam@gmail.com>, Philippe Schenker <philippe.schenker@toradex.com>, linux-kernel@vger.kernel.org Subject: [PATCH v1 17/25] arm64: dts: colibri-imx8x: eval: Add spi-to-can Date: Wed, 8 Mar 2023 13:52:51 +0100 Message-Id: <20230308125300.58244-18-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Infomaniak-Routing: alpha X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759805441491759290?= X-GMAIL-MSGID: =?utf-8?q?1759805559953446463?= |
Series |
Update Colibri iMX8X Devicetrees
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Commit Message
Philippe Schenker
March 8, 2023, 12:52 p.m. UTC
From: Philippe Schenker <philippe.schenker@toradex.com> Add mcp2515 spi-to-can to &lpspi2. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> --- .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
Comments
On Wed, 2023-03-08 at 14:00 +0100, Krzysztof Kozlowski wrote: > On 08/03/2023 13:52, Philippe Schenker wrote: > > From: Philippe Schenker <philippe.schenker@toradex.com> > > > > Add mcp2515 spi-to-can to &lpspi2. > > > > Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> > > --- > > > > .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 19 > > +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval- > > v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > index 625d2caaf5d1..e7e3cf462408 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > There is no such file. Thanks for your feedback! This file is being created int he first patch in the series. > > > @@ -11,6 +11,13 @@ aliases { > > rtc1 = &rtc; > > }; > > > > + /* fixed crystal dedicated to mcp25xx */ > > + clk16m: clock-16mhz-fixed { > > Drop "fixed". I'll prepare a v2 and plan to send it out beginning of next week. > > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <16000000>; > > + }; > > + > > gpio-keys { > > compatible = "gpio-keys"; > > pinctrl-names = "default"; > > @@ -44,6 +51,18 @@ rtc_i2c: rtc@68 { > > /* Colibri SPI */ > > &lpspi2 { > > status = "okay"; > > + > > + mcp2515: can@0 { > > + compatible = "microchip,mcp2515"; > > + reg = <0>; > > + interrupt-parent = <&lsio_gpio3>; > > + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; > > + pinctrl-0 = <&pinctrl_can_int>; > > + pinctrl-names = "default"; > > + clocks = <&clk16m>; > > You just sorted all nodes in previous patches and add something > unsorted? What is then the style of order? Random name? My logic behind this one is 1. compatible property 2. reg property 3. standard properties - first interrupt - then pinctrl 4. specific properties - again alphabetically: clocks, spi-max-frequency 5. status How would you do it? > > > + spi-max-frequency = <10000000>; > > + status = "okay"; > > Why do you need it? This chip is placed on our eval-board and we usually try to enable it so someone can right away use CAN. > > > + }; > > }; > > > > /* Colibri UART_B */ > > Best regards, > Krzysztof >
On Wed, 2023-03-08 at 14:00 +0100, Krzysztof Kozlowski wrote: > On 08/03/2023 13:52, Philippe Schenker wrote: > > From: Philippe Schenker <philippe.schenker@toradex.com> > > > > Add mcp2515 spi-to-can to &lpspi2. > > > > Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> > > --- > > > > .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 19 > > +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval- > > v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > index 625d2caaf5d1..e7e3cf462408 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi > > There is no such file. > > > @@ -11,6 +11,13 @@ aliases { > > rtc1 = &rtc; > > }; > > > > + /* fixed crystal dedicated to mcp25xx */ > > + clk16m: clock-16mhz-fixed { > > Drop "fixed". > > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <16000000>; > > + }; > > + > > gpio-keys { > > compatible = "gpio-keys"; > > pinctrl-names = "default"; > > @@ -44,6 +51,18 @@ rtc_i2c: rtc@68 { > > /* Colibri SPI */ > > &lpspi2 { > > status = "okay"; > > + > > + mcp2515: can@0 { > > + compatible = "microchip,mcp2515"; > > + reg = <0>; > > + interrupt-parent = <&lsio_gpio3>; > > + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; > > + pinctrl-0 = <&pinctrl_can_int>; > > + pinctrl-names = "default"; > > + clocks = <&clk16m>; > > You just sorted all nodes in previous patches and add something > unsorted? What is then the style of order? Random name? > > > + spi-max-frequency = <10000000>; > > + status = "okay"; > > Why do you need it? Ok, now I know what you mean. Will remove it in v2. > > > + }; > > }; > > > > /* Colibri UART_B */ > > Best regards, > Krzysztof >
On 08/03/2023 14:43, Philippe Schenker wrote: >>> + mcp2515: can@0 { >>> + compatible = "microchip,mcp2515"; >>> + reg = <0>; >>> + interrupt-parent = <&lsio_gpio3>; >>> + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; >>> + pinctrl-0 = <&pinctrl_can_int>; >>> + pinctrl-names = "default"; >>> + clocks = <&clk16m>; >> >> You just sorted all nodes in previous patches and add something >> unsorted? What is then the style of order? Random name? > > My logic behind this one is > > 1. compatible property > 2. reg property > 3. standard properties > - first interrupt > - then pinctrl > 4. specific properties > - again alphabetically: clocks, spi-max-frequency clocks and spi-max-frequency are standard properties. BTW, what is a specific property? Best regards, Krzysztof
On Wed, 2023-03-08 at 15:34 +0100, Krzysztof Kozlowski wrote: > On 08/03/2023 14:43, Philippe Schenker wrote: > > > > + mcp2515: can@0 { > > > > + compatible = "microchip,mcp2515"; > > > > + reg = <0>; > > > > + interrupt-parent = <&lsio_gpio3>; > > > > + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; > > > > + pinctrl-0 = <&pinctrl_can_int>; > > > > + pinctrl-names = "default"; > > > > + clocks = <&clk16m>; > > > > > > You just sorted all nodes in previous patches and add something > > > unsorted? What is then the style of order? Random name? > > > > My logic behind this one is > > > > 1. compatible property > > 2. reg property > > 3. standard properties > > - first interrupt > > - then pinctrl > > 4. specific properties > > - again alphabetically: clocks, spi-max-frequency > > clocks and spi-max-frequency are standard properties. > > BTW, what is a specific property? I mean specific to this driver. With standard properties I mean those you can add everywhere like pinctrl, interrupts etc. But then yes I agree you can pretty quickly start to argue... Would in this particular case something like mcp2515: can@0 { compatible = "microchip,mcp2515"; reg = <0>; pinctrl-0 = <&pinctrl_can_int>; pinctrl-names = "default"; clocks = <&clk16m>; interrupt-parent = <&lsio_gpio3>; interrupts = <13 IRQ_TYPE_EDGE_FALLING>; spi-max-frequency = <10000000>; }; be better? > > Best regards, > Krzysztof >
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index 625d2caaf5d1..e7e3cf462408 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -11,6 +11,13 @@ aliases { rtc1 = &rtc; }; + /* fixed crystal dedicated to mcp25xx */ + clk16m: clock-16mhz-fixed { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -44,6 +51,18 @@ rtc_i2c: rtc@68 { /* Colibri SPI */ &lpspi2 { status = "okay"; + + mcp2515: can@0 { + compatible = "microchip,mcp2515"; + reg = <0>; + interrupt-parent = <&lsio_gpio3>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_can_int>; + pinctrl-names = "default"; + clocks = <&clk16m>; + spi-max-frequency = <10000000>; + status = "okay"; + }; }; /* Colibri UART_B */