[02/15] dt-bindings: interconnect: OSM L3: Add SM6375 CPUCP compatible

Message ID 20230303-topic-sm6375_features0_dts-v1-2-8c8d94fba6f0@linaro.org
State New
Headers
Series SM6375 feature enablement (round one) |

Commit Message

Konrad Dybcio March 3, 2023, 9:58 p.m. UTC
  SM6375 has a CPUCP block (which for all Linux can tell is really rebadged
EPSS) responsible for scaling L3. Add a compatible for it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
 1 file changed, 1 insertion(+)
  

Comments

Krzysztof Kozlowski March 6, 2023, 8:58 a.m. UTC | #1
On 03/03/2023 22:58, Konrad Dybcio wrote:
> SM6375 has a CPUCP block (which for all Linux can tell is really rebadged
> EPSS) responsible for scaling L3. Add a compatible for it.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
  

Patch

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
index 576992a6dc5a..9d0a98d77ae9 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
@@ -29,6 +29,7 @@  properties:
           - enum:
               - qcom,sc7280-epss-l3
               - qcom,sc8280xp-epss-l3
+              - qcom,sm6375-cpucp-l3
               - qcom,sm8250-epss-l3
               - qcom,sm8350-epss-l3
           - const: qcom,epss-l3