Message ID | 20221024131544.31219-2-fchiby@baylibre.com |
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State | New |
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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id l24-20020a056000023800b00236627c078esm6322307wrz.110.2022.10.24.06.16.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Oct 2022 06:16:16 -0700 (PDT) From: Fadwa CHIBY <fchiby@baylibre.com> X-Google-Original-From: Fadwa CHIBY To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Johnson Wang <johnson.wang@mediatek.com>, "Zhiyong . Tao" <zhiyong.tao@mediatek.com> Cc: Fabien Parent <fparent@baylibre.com>, Fadwa CHIBY <fchiby@baylibre.com>, Rob Herring <robh@kernel.org>, Tinghan Shen <tinghan.shen@mediatek.com>, Sen Chu <sen.chu@mediatek.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings Date: Mon, 24 Oct 2022 15:15:41 +0200 Message-Id: <20221024131544.31219-2-fchiby@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221024131544.31219-1-fchiby@baylibre.com> References: <20221024131544.31219-1-fchiby@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747583011349855943?= X-GMAIL-MSGID: =?utf-8?q?1747583011349855943?= |
Series |
mediatek: pwrap: Add mt8365 pwrap support
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Commit Message
Fadwa Chiby
Oct. 24, 2022, 1:15 p.m. UTC
From: Fabien Parent <fparent@baylibre.com> Add pwrap binding documentation for Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++ 1 file changed, 3 insertions(+)
Comments
Il 24/10/22 15:15, Fadwa CHIBY ha scritto: > From: Fabien Parent <fparent@baylibre.com> > > Add pwrap binding documentation for > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt > index d24e2bc444be..8424b93c432e 100644 > --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt > +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt > @@ -30,6 +30,7 @@ Required properties in pwrap device node. > "mediatek,mt8186-pwrap" for MT8186 SoCs > "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs > "mediatek,mt8195-pwrap" for MT8195 SoCs > + "mediatek,mt8365-pwrap" for MT8365 SoCs > "mediatek,mt8516-pwrap" for MT8516 SoCs > - interrupts: IRQ for pwrap in SOC > - reg-names: "pwrap" is required; "pwrap-bridge" is optional. > @@ -39,6 +40,8 @@ Required properties in pwrap device node. > - clock-names: Must include the following entries: > "spi": SPI bus clock > "wrap": Main module clock > + "sys": System module clock (for MT8365 SoC) "sys": Optional system module clock "tmr": Optional timer module clock ....as it's not granted that MT8365 is and will always be the only user. Cheers, Angelo > + "tmr": Timer module clock (for MT8365 SoC) > - clocks: Must contain an entry for each entry in clock-names. > > Optional properities:
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index d24e2bc444be..8424b93c432e 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -30,6 +30,7 @@ Required properties in pwrap device node. "mediatek,mt8186-pwrap" for MT8186 SoCs "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs "mediatek,mt8195-pwrap" for MT8195 SoCs + "mediatek,mt8365-pwrap" for MT8365 SoCs "mediatek,mt8516-pwrap" for MT8516 SoCs - interrupts: IRQ for pwrap in SOC - reg-names: "pwrap" is required; "pwrap-bridge" is optional. @@ -39,6 +40,8 @@ Required properties in pwrap device node. - clock-names: Must include the following entries: "spi": SPI bus clock "wrap": Main module clock + "sys": System module clock (for MT8365 SoC) + "tmr": Timer module clock (for MT8365 SoC) - clocks: Must contain an entry for each entry in clock-names. Optional properities: