Message ID | 20230223-topic-gmuwrapper-v3-10-5be55a336819@linaro.org |
---|---|
State | New |
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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id h23-20020a2ea497000000b0029599744c02sm414838lji.75.2023.02.23.04.06.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 04:07:00 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Thu, 23 Feb 2023 13:06:44 +0100 Subject: [PATCH v3 10/15] drm/msm/a6xx: Fix A680 highest bank bit value MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230223-topic-gmuwrapper-v3-10-5be55a336819@linaro.org> References: <20230223-topic-gmuwrapper-v3-0-5be55a336819@linaro.org> In-Reply-To: <20230223-topic-gmuwrapper-v3-0-5be55a336819@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Akhil P Oommen <quic_akhilpo@quicinc.com> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark <robdclark@chromium.org>, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677154003; l=1043; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XyF/fIhqGhaqw/LSLnLQoZLpoApnz2Tm2KTMjRETKS0=; b=KNcnjoD9rWmy5mT4YH7OnatzxLE4iAZRwnM2y6dLWueGTxPwo3uCMS0NPrLwqJpUq5uh442AJSwo cgRHrMA2AlIAq7g9yAw9JnDnekIYxgGTePs30xvYuP3cIFpemrAR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758623563645971558?= X-GMAIL-MSGID: =?utf-8?q?1758623563645971558?= |
Series |
GMU-less A6xx support (A610, A619_holi)
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Commit Message
Konrad Dybcio
Feb. 23, 2023, 12:06 p.m. UTC
According to the vendor sources, it's equal to 16, which makes hbb_lo
equal to 3.
Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
Comments
On Thu, 23 Feb 2023 at 14:07, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > According to the vendor sources, it's equal to 16, which makes hbb_lo > equal to 3. I think we might be stricken with the ddr kind difference here, but I would not bet on it. > > Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index b5017c56fa1b..2c4afecdd213 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) > hbb_lo = 2; > } > > - if (adreno_is_a640_family(adreno_gpu)) { > + if (adreno_is_a640(adreno_gpu)) { > amsbc = 1; > /* HBB = 15 */ > hbb_lo = 2; > } > > + if (adreno_is_a680(adreno_gpu)) { > + amsbc = 1; > + /* HBB = 16 */ > + hbb_lo = 3; > + } > + > if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { > amsbc = 1; > /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ > > -- > 2.39.2 >
On 23.02.2023 14:06, Dmitry Baryshkov wrote: > On Thu, 23 Feb 2023 at 14:07, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> According to the vendor sources, it's equal to 16, which makes hbb_lo >> equal to 3. > > I think we might be stricken with the ddr kind difference here, but I > would not bet on it. It totally is, but it also seems to be SoC-dependent.. I think all 8180x devices shipped with LPDDR4X FWIW Konrad > >> >> Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list") >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- >> 1 file changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> index b5017c56fa1b..2c4afecdd213 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) >> hbb_lo = 2; >> } >> >> - if (adreno_is_a640_family(adreno_gpu)) { >> + if (adreno_is_a640(adreno_gpu)) { >> amsbc = 1; >> /* HBB = 15 */ >> hbb_lo = 2; >> } >> >> + if (adreno_is_a680(adreno_gpu)) { >> + amsbc = 1; >> + /* HBB = 16 */ >> + hbb_lo = 3; >> + } >> + >> if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { >> amsbc = 1; >> /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ >> >> -- >> 2.39.2 >> > >
On Thu, 23 Feb 2023 at 15:49, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 23.02.2023 14:06, Dmitry Baryshkov wrote: > > On Thu, 23 Feb 2023 at 14:07, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > >> > >> According to the vendor sources, it's equal to 16, which makes hbb_lo > >> equal to 3. > > > > I think we might be stricken with the ddr kind difference here, but I > > would not bet on it. > It totally is, but it also seems to be SoC-dependent.. > I think all 8180x devices shipped with LPDDR4X FWIW I think so too. However sdmshrike dts uses LPDDR5. > > Konrad > > > >> > >> Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list") > >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > >> --- > >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- > >> 1 file changed, 7 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > >> index b5017c56fa1b..2c4afecdd213 100644 > >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > >> @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) > >> hbb_lo = 2; > >> } > >> > >> - if (adreno_is_a640_family(adreno_gpu)) { > >> + if (adreno_is_a640(adreno_gpu)) { > >> amsbc = 1; > >> /* HBB = 15 */ > >> hbb_lo = 2; > >> } > >> > >> + if (adreno_is_a680(adreno_gpu)) { > >> + amsbc = 1; > >> + /* HBB = 16 */ > >> + hbb_lo = 3; > >> + } > >> + > >> if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { > >> amsbc = 1; > >> /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ > >> > >> -- > >> 2.39.2 > >> > > > >
On 23.02.2023 15:48, Dmitry Baryshkov wrote: > On Thu, 23 Feb 2023 at 15:49, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> >> >> On 23.02.2023 14:06, Dmitry Baryshkov wrote: >>> On Thu, 23 Feb 2023 at 14:07, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >>>> >>>> According to the vendor sources, it's equal to 16, which makes hbb_lo >>>> equal to 3. >>> >>> I think we might be stricken with the ddr kind difference here, but I >>> would not bet on it. >> It totally is, but it also seems to be SoC-dependent.. >> I think all 8180x devices shipped with LPDDR4X FWIW > > I think so too. However sdmshrike dts uses LPDDR5. Yeah.. it may be better to skip this patch; it should be possible to apply this series without this one. Konrad > >> >> Konrad >>> >>>> >>>> Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list") >>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >>>> --- >>>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- >>>> 1 file changed, 7 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>> index b5017c56fa1b..2c4afecdd213 100644 >>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>> @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) >>>> hbb_lo = 2; >>>> } >>>> >>>> - if (adreno_is_a640_family(adreno_gpu)) { >>>> + if (adreno_is_a640(adreno_gpu)) { >>>> amsbc = 1; >>>> /* HBB = 15 */ >>>> hbb_lo = 2; >>>> } >>>> >>>> + if (adreno_is_a680(adreno_gpu)) { >>>> + amsbc = 1; >>>> + /* HBB = 16 */ >>>> + hbb_lo = 3; >>>> + } >>>> + >>>> if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { >>>> amsbc = 1; >>>> /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ >>>> >>>> -- >>>> 2.39.2 >>>> >>> >>> > > >
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index b5017c56fa1b..2c4afecdd213 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) hbb_lo = 2; } - if (adreno_is_a640_family(adreno_gpu)) { + if (adreno_is_a640(adreno_gpu)) { amsbc = 1; /* HBB = 15 */ hbb_lo = 2; } + if (adreno_is_a680(adreno_gpu)) { + amsbc = 1; + /* HBB = 16 */ + hbb_lo = 3; + } + if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { amsbc = 1; /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */