Message ID | 1676986616-21378-2-git-send-email-quic_mojha@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp13267wrd; Tue, 21 Feb 2023 05:40:16 -0800 (PST) X-Google-Smtp-Source: AK7set+Cni/NRozGDCENzf4aKsHlSrVHy4QAmmtxd0vn4rZZs7DTIDP0qihMGaJjV4JAlNVINDFp X-Received: by 2002:a17:90b:1bd1:b0:233:be3d:8a49 with SMTP id oa17-20020a17090b1bd100b00233be3d8a49mr7155254pjb.11.1676986816481; Tue, 21 Feb 2023 05:40:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676986816; cv=none; d=google.com; s=arc-20160816; b=TghjsbreNBMRqOEJiFSqOr4mWUKKDzi+dIZzVWuAZMCyzPmbvrOjMkbroejq9Pj0VL Wyg2Mra5H8k08tw1nyQ2q9VC7dIam7sM1+OszFPSryk/mWSX2mIeJyxK6hgOSV07VZjX R7l7jHdDhArh2eecSpX+DkcUkkF6KF3iE8ldQUVcCI29d7ddBtyEIZgNJ0HQxVwVqeeU eauer58QhE8pxLZAY44sHjHkx6oDCvdQwUqZsn0I0z3xH33EfshMp2eMkj4wqVLN3Dxa xcyPgJCavcXL6OxLQeBsixiVcMBs6MjaKhFRsUZpND2W92SRHNjTZACEPZ3aBB13w3Au zFTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=cpn3pVJJ2A+uUeRffP+bp2kSRX5refKzKy5ekDDW54I=; b=KRHN3fOI6tzz3OhMAHexLJh2DNZuk7dDaZIXS8fPAPghFcGu2ntFeGyoO8fKKgl+V/ uIDSRvQvY4oHmUoDhf0V2/RwCzqy3U8GCANlOjhT2jKCAVcvBmhQ8CkkoksjO2Nug1P0 FYJYHO3/G1K/yOVTsWMhVQ8pBrBbUysqQfzNvtY7kHZ2EEogUDyUcFm3JMAeidh6PnJQ ISbRV0a70KnrugSWcycFCvkgCNuBVECGUVtfj3pCgM4WMjHoSZS0oFdXFw97zjuTQOpn msv5cgX5q0VqUf5iEoo7VlCpC2cY/RFqu2Twf2S/sBQdcg5bNjoxRrOb2vDAyZi1YWZ4 7zJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="Gl60/I1o"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r36-20020a17090a43a700b002368e9bcb03si8563110pjg.118.2023.02.21.05.40.03; Tue, 21 Feb 2023 05:40:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="Gl60/I1o"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232845AbjBUNhw (ORCPT <rfc822;kloczko.tomasz@gmail.com> + 99 others); Tue, 21 Feb 2023 08:37:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233829AbjBUNhr (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 21 Feb 2023 08:37:47 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4569B24482; Tue, 21 Feb 2023 05:37:45 -0800 (PST) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 31LDX7CQ005097; Tue, 21 Feb 2023 13:37:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=cpn3pVJJ2A+uUeRffP+bp2kSRX5refKzKy5ekDDW54I=; b=Gl60/I1onEVwIIzIhiOl7QLer/RUszQxilhF+3JyHxCqYhZx8vc+gBIDzqJ142eySYkk +a2PwRNXzYcCmx3VksA6Ec8qQXfZPH1GUo8ktBbSWX6YAuTOZLxW2g1uMT1TBDc79qpx zooh+uYmmInmhbx5haHQWUiapiHqUHSKt4qSDqi9EcrfS6lhSfpoRY+0gow+AEzyv7LH 33JnpnIKvOG/xvI9fuHCyy+vlxo5LdbIqmWrysF5QjnSP33GlgXbI+sf0BQ6CXXsrafI 3LVit1yby6ARdMVe2lY1xvnlJyI4o+MI5y45B7P+JKulItB6o1GRyg4JCVLvBDJRX/TY bQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nvxxkg0a1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Feb 2023 13:37:39 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31LDbceb024405 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Feb 2023 13:37:38 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 21 Feb 2023 05:37:35 -0800 From: Mukesh Ojha <quic_mojha@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <elder@linaro.org> CC: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Mukesh Ojha <quic_mojha@quicinc.com> Subject: [PATCH v2 2/2] arm64: dts: qcom: sm8450: Add IMEM and PIL info region Date: Tue, 21 Feb 2023 19:06:56 +0530 Message-ID: <1676986616-21378-2-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1676986616-21378-1-git-send-email-quic_mojha@quicinc.com> References: <1676986616-21378-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9_7hlP6uJslk9bXRin5PbXe2d3RANINC X-Proofpoint-ORIG-GUID: 9_7hlP6uJslk9bXRin5PbXe2d3RANINC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-21_06,2023-02-20_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=478 suspectscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302210115 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758448127584941499?= X-GMAIL-MSGID: =?utf-8?q?1758448127584941499?= |
Series |
[v2,1/2] dt-bindings: sram: qcom,imem: document sm8450
|
|
Commit Message
Mukesh Ojha
Feb. 21, 2023, 1:36 p.m. UTC
Add a simple-mfd representing IMEM on SM8450 and define the PIL
relocation info region, so that post mortem tools will be able
to locate the loaded remoteprocs.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
Changes in v2:
- put ranges after regs and corrected the sram node position.
arch/arm64/boot/dts/qcom/sm8450.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
Comments
On 21.02.2023 14:36, Mukesh Ojha wrote: > Add a simple-mfd representing IMEM on SM8450 and define the PIL > relocation info region, so that post mortem tools will be able > to locate the loaded remoteprocs. > > Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> > --- > Changes in v2: > - put ranges after regs and corrected the sram node position. > > arch/arm64/boot/dts/qcom/sm8450.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi > index 1a744a3..2a4f4ac 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi > @@ -3814,6 +3814,20 @@ > }; > }; > > + sram@146aa000 { Looks like it's not sorted properly? Should be between TLMM and apss_smmu address-wise. Konrad > + compatible = "qcom,sm8450-imem", "syscon", "simple-mfd"; > + reg = <0 0x146aa000 0 0x1000>; > + ranges = <0 0 0x146aa000 0x1000>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + pil-reloc@94c { > + compatible = "qcom,pil-reloc-info"; > + reg = <0x94c 0xc8>; > + }; > + }; > + > timer@17420000 { > compatible = "arm,armv7-timer-mem"; > #address-cells = <1>;
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1a744a3..2a4f4ac 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3814,6 +3814,20 @@ }; }; + sram@146aa000 { + compatible = "qcom,sm8450-imem", "syscon", "simple-mfd"; + reg = <0 0x146aa000 0 0x1000>; + ranges = <0 0 0x146aa000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + timer@17420000 { compatible = "arm,armv7-timer-mem"; #address-cells = <1>;