diff mbox series

drm/rockchip: dsi: Fix VOP selection on SoCs that support it

Message ID 20221023160747.607943-1-megi@xff.cz
State New
Headers
Series drm/rockchip: dsi: Fix VOP selection on SoCs that support it |

Commit Message

Ondřej Jirman Oct. 23, 2022, 4:07 p.m. UTC 
  lcdsel_grf_reg is defined as u32, so "< 0" comaprison is always false,
which breaks VOP selection on eg. RK3399. Compare against 0.

Fixes: f3aaa6125b6f ("drm/rockchip: dsi: add rk3568 support")
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Chris Morgan Oct. 24, 2022, 8:12 p.m. UTC | #1 
On Sun, Oct 23, 2022 at 06:07:47PM +0200, Ondrej Jirman wrote:
> lcdsel_grf_reg is defined as u32, so "< 0" comaprison is always false,
> which breaks VOP selection on eg. RK3399. Compare against 0.
> 

Sorry about that. I can confirm this works for me on the rk3566 (specifically
the Anbernic RG503).

Tested-by: Chris Morgan <macromorgan@hotmail.com>

> Fixes: f3aaa6125b6f ("drm/rockchip: dsi: add rk3568 support")
> Signed-off-by: Ondrej Jirman <megi@xff.cz>
> ---
>  drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> index 7d50a4f463d9..2982a4e9a6ed 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> @@ -760,7 +760,7 @@ static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi)
>  static void dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi,
>  					    int mux)
>  {
> -	if (dsi->cdata->lcdsel_grf_reg < 0)
> +	if (dsi->cdata->lcdsel_grf_reg)
>  		regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg,
>  			mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big);
>  }
> @@ -1643,7 +1643,6 @@ static const struct rockchip_dw_dsi_chip_data rk3399_chip_data[] = {
>  static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = {
>  	{
>  		.reg = 0xfe060000,
> -		.lcdsel_grf_reg = -1,
>  		.lanecfg1_grf_reg = RK3568_GRF_VO_CON2,
>  		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI0_SKEWCALHS |
>  					  RK3568_DSI0_FORCETXSTOPMODE |
> @@ -1653,7 +1652,6 @@ static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = {
>  	},
>  	{
>  		.reg = 0xfe070000,
> -		.lcdsel_grf_reg = -1,
>  		.lanecfg1_grf_reg = RK3568_GRF_VO_CON3,
>  		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI1_SKEWCALHS |
>  					  RK3568_DSI1_FORCETXSTOPMODE |
> -- 
> 2.38.1
>
Heiko Stübner Oct. 29, 2022, 1 p.m. UTC | #2 
On Sun, 23 Oct 2022 18:07:47 +0200, Ondrej Jirman wrote:
> lcdsel_grf_reg is defined as u32, so "< 0" comaprison is always false,
> which breaks VOP selection on eg. RK3399. Compare against 0.
> 
> 

Applied, thanks!

[1/1] drm/rockchip: dsi: Fix VOP selection on SoCs that support it
      commit: 553c5a429aee26c9cfaf37ae158a8915540270fe

Best regards,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 7d50a4f463d9..2982a4e9a6ed 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -760,7 +760,7 @@  static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi)
 static void dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi,
 					    int mux)
 {
-	if (dsi->cdata->lcdsel_grf_reg < 0)
+	if (dsi->cdata->lcdsel_grf_reg)
 		regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg,
 			mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big);
 }
@@ -1643,7 +1643,6 @@  static const struct rockchip_dw_dsi_chip_data rk3399_chip_data[] = {
 static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = {
 	{
 		.reg = 0xfe060000,
-		.lcdsel_grf_reg = -1,
 		.lanecfg1_grf_reg = RK3568_GRF_VO_CON2,
 		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI0_SKEWCALHS |
 					  RK3568_DSI0_FORCETXSTOPMODE |
@@ -1653,7 +1652,6 @@  static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = {
 	},
 	{
 		.reg = 0xfe070000,
-		.lcdsel_grf_reg = -1,
 		.lanecfg1_grf_reg = RK3568_GRF_VO_CON3,
 		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI1_SKEWCALHS |
 					  RK3568_DSI1_FORCETXSTOPMODE |