diff mbox series

[1/2] rtc: pcf85363: add support for the quartz-load-femtofarads property

Message ID 20230213095018.2255225-2-javier.carrasco@wolfvision.net
State New
Headers
Series pcf85363: support for quartz-load-femtofarads |

Commit Message

Javier Carrasco Feb. 13, 2023, 9:50 a.m. UTC 
  The quartz oscillator load capacitance of the PCF85263 and PCF85363 can
be adjusted to 6 pF, 7 pF (default) and 12.5 pF with the CL[1:0] bits in
the oscillator control register (address 25h).

Signed-off-by: Javier Carrasco <javier.carrasco@wolfvision.net>
---
 drivers/rtc/rtc-pcf85363.c | 37 ++++++++++++++++++++++++++++++++++++-
 1 file changed, 36 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Feb. 13, 2023, 12:24 p.m. UTC | #1 
On 13/02/2023 10:50, Javier Carrasco wrote:
> The quartz oscillator load capacitance of the PCF85263 and PCF85363 can
> be adjusted to 6 pF, 7 pF (default) and 12.5 pF with the CL[1:0] bits in
> the oscillator control register (address 25h).
> 
> Signed-off-by: Javier Carrasco <javier.carrasco@wolfvision.net>
> ---
>  drivers/rtc/rtc-pcf85363.c | 37 ++++++++++++++++++++++++++++++++++++-
>  1 file changed, 36 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
> index c05b722f0060..941f9264cf0a 100644
> --- a/drivers/rtc/rtc-pcf85363.c
> +++ b/drivers/rtc/rtc-pcf85363.c
> @@ -101,6 +101,10 @@
>  #define PIN_IO_INTA_OUT	2
>  #define PIN_IO_INTA_HIZ	3
>  
> +#define OSC_CAP_SEL	GENMASK(1, 0)
> +#define OSC_CAP_6000	0x01
> +#define OSC_CAP_12500	0x02
> +
>  #define STOP_EN_STOP	BIT(0)
>  
>  #define RESET_CPR	0xa4
> @@ -117,6 +121,32 @@ struct pcf85x63_config {
>  	unsigned int num_nvram;
>  };
>  
> +static int pcf85363_load_capacitance(struct pcf85363 *pcf85363, struct device_node *node)
> +{
> +	u32 load = 7000;
> +	u8 value = 0;
> +
> +	of_property_read_u32(node, "quartz-load-femtofarads", &load);
> +
> +	switch (load) {
> +	default:
> +		dev_warn(&pcf85363->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
> +			 load);
> +		fallthrough;
> +	case 7000:
> +		break;
> +	case 6000:
> +		value |= OSC_CAP_6000;
> +		break;
> +	case 12500:
> +		value |= OSC_CAP_12500;
> +		break;
> +	}
> +
> +	return regmap_update_bits(pcf85363->regmap, CTRL_OSCILLATOR,
> +				  OSC_CAP_SEL, value);
> +}
> +
>  static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
>  {
>  	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
> @@ -372,7 +402,7 @@ static int pcf85363_probe(struct i2c_client *client)
>  			.reg_write = pcf85363_nvram_write,
>  		},
>  	};
> -	int ret, i;
> +	int ret, i, err;
>  
>  	if (data)
>  		config = data;
> @@ -394,6 +424,11 @@ static int pcf85363_probe(struct i2c_client *client)
>  	if (IS_ERR(pcf85363->rtc))
>  		return PTR_ERR(pcf85363->rtc);
>  
> +	err = pcf85363_load_capacitance(pcf85363, client->dev.of_node);

Aren't you updating it for all variants? But the property is marked as
not valid for them.

Best regards,
Krzysztof
Alexandre Belloni Feb. 13, 2023, 5:03 p.m. UTC | #2 
On 13/02/2023 10:50:17+0100, Javier Carrasco wrote:
> The quartz oscillator load capacitance of the PCF85263 and PCF85363 can
> be adjusted to 6 pF, 7 pF (default) and 12.5 pF with the CL[1:0] bits in
> the oscillator control register (address 25h).
> 
> Signed-off-by: Javier Carrasco <javier.carrasco@wolfvision.net>
> ---
>  drivers/rtc/rtc-pcf85363.c | 37 ++++++++++++++++++++++++++++++++++++-
>  1 file changed, 36 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
> index c05b722f0060..941f9264cf0a 100644
> --- a/drivers/rtc/rtc-pcf85363.c
> +++ b/drivers/rtc/rtc-pcf85363.c
> @@ -101,6 +101,10 @@
>  #define PIN_IO_INTA_OUT	2
>  #define PIN_IO_INTA_HIZ	3
>  
> +#define OSC_CAP_SEL	GENMASK(1, 0)
> +#define OSC_CAP_6000	0x01
> +#define OSC_CAP_12500	0x02
> +
>  #define STOP_EN_STOP	BIT(0)
>  
>  #define RESET_CPR	0xa4
> @@ -117,6 +121,32 @@ struct pcf85x63_config {
>  	unsigned int num_nvram;
>  };
>  
> +static int pcf85363_load_capacitance(struct pcf85363 *pcf85363, struct device_node *node)
> +{
> +	u32 load = 7000;
> +	u8 value = 0;
> +
> +	of_property_read_u32(node, "quartz-load-femtofarads", &load);
> +
> +	switch (load) {
> +	default:
> +		dev_warn(&pcf85363->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
> +			 load);
> +		fallthrough;
> +	case 7000:
> +		break;
> +	case 6000:
> +		value |= OSC_CAP_6000;

Why are you using the |= operator?

> +		break;
> +	case 12500:
> +		value |= OSC_CAP_12500;
> +		break;
> +	}
> +
> +	return regmap_update_bits(pcf85363->regmap, CTRL_OSCILLATOR,
> +				  OSC_CAP_SEL, value);
> +}
> +
>  static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
>  {
>  	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
> @@ -372,7 +402,7 @@ static int pcf85363_probe(struct i2c_client *client)
>  			.reg_write = pcf85363_nvram_write,
>  		},
>  	};
> -	int ret, i;
> +	int ret, i, err;
>  
>  	if (data)
>  		config = data;
> @@ -394,6 +424,11 @@ static int pcf85363_probe(struct i2c_client *client)
>  	if (IS_ERR(pcf85363->rtc))
>  		return PTR_ERR(pcf85363->rtc);
>  
> +	err = pcf85363_load_capacitance(pcf85363, client->dev.of_node);
> +	if (err < 0)
> +		dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
> +			 err);
> +
>  	pcf85363->rtc->ops = &rtc_ops;
>  	pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
>  	pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099;
> -- 
> 2.37.2
> 
> 
> Javier Carrasco 
> Research and Development
> 
> Wolfvision GmbH 
> Oberes Ried 14 | 6833 Klaus | Austria 
> Tel: +43 5523 52250 <tel:+43552352250> | Mail: javier.carrasco@wolfvision.net <mailto:javier.carrasco@wolfvision.net>
> 
> Website: wolfvision.com <www.wolfvision.com> 
> Firmenbuch / Commercial Register: FN283521v Feldkirch/Austria
>
diff mbox series

Patch

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index c05b722f0060..941f9264cf0a 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -101,6 +101,10 @@ 
 #define PIN_IO_INTA_OUT	2
 #define PIN_IO_INTA_HIZ	3
 
+#define OSC_CAP_SEL	GENMASK(1, 0)
+#define OSC_CAP_6000	0x01
+#define OSC_CAP_12500	0x02
+
 #define STOP_EN_STOP	BIT(0)
 
 #define RESET_CPR	0xa4
@@ -117,6 +121,32 @@  struct pcf85x63_config {
 	unsigned int num_nvram;
 };
 
+static int pcf85363_load_capacitance(struct pcf85363 *pcf85363, struct device_node *node)
+{
+	u32 load = 7000;
+	u8 value = 0;
+
+	of_property_read_u32(node, "quartz-load-femtofarads", &load);
+
+	switch (load) {
+	default:
+		dev_warn(&pcf85363->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
+			 load);
+		fallthrough;
+	case 7000:
+		break;
+	case 6000:
+		value |= OSC_CAP_6000;
+		break;
+	case 12500:
+		value |= OSC_CAP_12500;
+		break;
+	}
+
+	return regmap_update_bits(pcf85363->regmap, CTRL_OSCILLATOR,
+				  OSC_CAP_SEL, value);
+}
+
 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
@@ -372,7 +402,7 @@  static int pcf85363_probe(struct i2c_client *client)
 			.reg_write = pcf85363_nvram_write,
 		},
 	};
-	int ret, i;
+	int ret, i, err;
 
 	if (data)
 		config = data;
@@ -394,6 +424,11 @@  static int pcf85363_probe(struct i2c_client *client)
 	if (IS_ERR(pcf85363->rtc))
 		return PTR_ERR(pcf85363->rtc);
 
+	err = pcf85363_load_capacitance(pcf85363, client->dev.of_node);
+	if (err < 0)
+		dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
+			 err);
+
 	pcf85363->rtc->ops = &rtc_ops;
 	pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 	pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099;