diff mbox series

[02/24] ACPICA: MADT: Add RISC-V INTC interrupt controller

Message ID 20230130182225.2471414-3-sunilvl@ventanamicro.com
State New
Headers
Series Add basic ACPI support for RISC-V |

Commit Message

Sunil V L Jan. 30, 2023, 6:22 p.m. UTC 
  The ECR to add RISC-V INTC interrupt controller is approved by
the UEFI forum and will be availabl in the next revision of
the ACPI specification.

This patch is not yet merged in ACPICA but a PR is raised.

ACPICA PR: https://github.com/acpica/acpica/pull/804
Reference: Mantis ID: 2348

Cc: Robert Moore <robert.moore@intel.com>
Cc: acpica-devel@lists.linuxfoundation.org
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
 include/acpi/actbl2.h | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

Comments

Conor Dooley Feb. 8, 2023, 7:59 p.m. UTC | #1 
On Mon, Jan 30, 2023 at 11:52:03PM +0530, Sunil V L wrote:
> The ECR to add RISC-V INTC interrupt controller is approved by
> the UEFI forum and will be availabl in the next revision of

nit: available

> the ACPI specification.
> 
> This patch is not yet merged in ACPICA but a PR is raised.
> 
> ACPICA PR: https://github.com/acpica/acpica/pull/804

I had a quick check with git grep, and as this doesn't appear to be a
regular pattern in the history, so could you please make this a regular
Link: trailer?

Cheers,
Conor.

> Reference: Mantis ID: 2348
> 
> Cc: Robert Moore <robert.moore@intel.com>
> Cc: acpica-devel@lists.linuxfoundation.org
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  include/acpi/actbl2.h | 21 ++++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
> index b2973dbe37ee..c432fd15db65 100644
> --- a/include/acpi/actbl2.h
> +++ b/include/acpi/actbl2.h
> @@ -891,7 +891,8 @@ enum acpi_madt_type {
>  	ACPI_MADT_TYPE_MSI_PIC = 21,
>  	ACPI_MADT_TYPE_BIO_PIC = 22,
>  	ACPI_MADT_TYPE_LPC_PIC = 23,
> -	ACPI_MADT_TYPE_RESERVED = 24,	/* 24 to 0x7F are reserved */
> +	ACPI_MADT_TYPE_RINTC = 24,
> +	ACPI_MADT_TYPE_RESERVED = 25,	/* 25 to 0x7F are reserved */
>  	ACPI_MADT_TYPE_OEM_RESERVED = 0x80	/* 0x80 to 0xFF are reserved for OEM use */
>  };
>  
> @@ -1250,6 +1251,24 @@ enum acpi_madt_lpc_pic_version {
>  	ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
>  };
>  
> +/* 24: RISC-V INTC */
> +struct acpi_madt_rintc {
> +	struct acpi_subtable_header header;
> +	u8 version;
> +	u8 reserved;
> +	u32 flags;
> +	u64 hart_id;
> +	u32 uid;		/* ACPI processor UID */
> +};
> +
> +/* Values for RISC-V INTC Version field above */
> +
> +enum acpi_madt_rintc_version {
> +	ACPI_MADT_RINTC_VERSION_NONE = 0,
> +	ACPI_MADT_RINTC_VERSION_V1 = 1,
> +	ACPI_MADT_RINTC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
> +};
> +
>  /* 80: OEM data */
>  
>  struct acpi_madt_oem_data {
> -- 
> 2.38.0
>
Sunil V L Feb. 13, 2023, 5:13 a.m. UTC | #2 
On Wed, Feb 08, 2023 at 07:59:00PM +0000, Conor Dooley wrote:
> On Mon, Jan 30, 2023 at 11:52:03PM +0530, Sunil V L wrote:
> > The ECR to add RISC-V INTC interrupt controller is approved by
> > the UEFI forum and will be availabl in the next revision of
> 
> nit: available
> 
Thanks!

> > the ACPI specification.
> > 
> > This patch is not yet merged in ACPICA but a PR is raised.
> > 
> > ACPICA PR: https://github.com/acpica/acpica/pull/804
> 
> I had a quick check with git grep, and as this doesn't appear to be a
> regular pattern in the history, so could you please make this a regular
> Link: trailer?
> 
This patch should be merged in acpica repo first and then we will get
this in standard format. Until then, it exists to allow other
patches get reviewed. I believe by the time we get all other patches
reviewed, acpica will have this merged.

Thanks!
Sunil
diff mbox series

Patch

diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index b2973dbe37ee..c432fd15db65 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -891,7 +891,8 @@  enum acpi_madt_type {
 	ACPI_MADT_TYPE_MSI_PIC = 21,
 	ACPI_MADT_TYPE_BIO_PIC = 22,
 	ACPI_MADT_TYPE_LPC_PIC = 23,
-	ACPI_MADT_TYPE_RESERVED = 24,	/* 24 to 0x7F are reserved */
+	ACPI_MADT_TYPE_RINTC = 24,
+	ACPI_MADT_TYPE_RESERVED = 25,	/* 25 to 0x7F are reserved */
 	ACPI_MADT_TYPE_OEM_RESERVED = 0x80	/* 0x80 to 0xFF are reserved for OEM use */
 };
 
@@ -1250,6 +1251,24 @@  enum acpi_madt_lpc_pic_version {
 	ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
 };
 
+/* 24: RISC-V INTC */
+struct acpi_madt_rintc {
+	struct acpi_subtable_header header;
+	u8 version;
+	u8 reserved;
+	u32 flags;
+	u64 hart_id;
+	u32 uid;		/* ACPI processor UID */
+};
+
+/* Values for RISC-V INTC Version field above */
+
+enum acpi_madt_rintc_version {
+	ACPI_MADT_RINTC_VERSION_NONE = 0,
+	ACPI_MADT_RINTC_VERSION_V1 = 1,
+	ACPI_MADT_RINTC_VERSION_RESERVED = 2	/* 2 and greater are reserved */
+};
+
 /* 80: OEM data */
 
 struct acpi_madt_oem_data {