Message ID | 20230209232302.25658-1-palmer@rivosinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp633319wrn; Thu, 9 Feb 2023 15:27:27 -0800 (PST) X-Google-Smtp-Source: AK7set/9g2Ejrk2SFjgM202VVLB9pdfdMdaZ5GdCzybv6HN4RaAn4Xwh0YiBt4Aw1qa2a1GcwOqA X-Received: by 2002:a50:c30d:0:b0:4ab:4411:2f71 with SMTP id a13-20020a50c30d000000b004ab44112f71mr683020edb.37.1675985247056; Thu, 09 Feb 2023 15:27:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675985247; cv=none; d=google.com; s=arc-20160816; b=zt/o3iHETuBumlniTqZa1wc3eYDTutA3GXf0VPRvG/LmxTmor6IF3SF0+r/6rSLpY0 WyUSSIJxV6U6s586l7EqvSxm+tvw4SUGp/0qaT8FXlXuxJqBYg3hs9/SFRZRLLUiDGDc zpe3Z0X6GXz24VmMx+MroEtyXne8Taqq0OZmspXQtZ2kcPJ7F8Pb26JVqbhkPBjv0DL7 tY8jIZ2I6O4KW5ULqym9JYSLdooGB20Yk3JUK6i7z34Mk2650ldQ7/v+y9KW/E25RbCv 7doMUJBixk66qgAcPpZActp5cy5f/hSrhjKTgREpk4FsoSiwXC1+SfFW9eoa5Rvhyhq7 Q1DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:from:cc:content-transfer-encoding :mime-version:message-id:date:subject:dkim-signature; bh=B3pPfVMpUiPSyCCzmCrD57AemmKpys6aCeZPw1vQkzc=; b=amp9szge+cWTlYn72cMQ5WRnQg+AA3fyTS3peK/okKn2OriWy/9bMfP51JiXkPl9rc 4gpB9aUCYO5EpjUJWpZtU2ihaiShgjYwmjmkp1xb7c99M8BL0ATSTOMsAIQF5rjNRFA1 hSWTcTR1WLTllISo+pd4TtMk/J/4+JQApGuf2Do6wyHWWrPipihGB2xHPuQGMVlj4ihJ 5plhp4EMOnYvpDODviLXhbT9bdh3k0e+kS2LTQrU2vJEMvVxtkt14Esaj6+MY3SsVEkC PybKihre2ItzjzCMU5jR9BabAR+qLnWV/t///Hrxd1Gz/rQJPmOExijGOHwGnmCuL78/ mUuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=jgWwWwa7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n15-20020a056402514f00b004ab161e134bsi3626668edd.461.2023.02.09.15.27.02; Thu, 09 Feb 2023 15:27:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=jgWwWwa7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230308AbjBIXYp (ORCPT <rfc822;ybw1215001957@gmail.com> + 99 others); Thu, 9 Feb 2023 18:24:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbjBIXYn (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 9 Feb 2023 18:24:43 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70F0A20059 for <linux-kernel@vger.kernel.org>; Thu, 9 Feb 2023 15:24:42 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id b5so4689272plz.5 for <linux-kernel@vger.kernel.org>; Thu, 09 Feb 2023 15:24:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:message-id:date :subject:from:to:cc:subject:date:message-id:reply-to; bh=B3pPfVMpUiPSyCCzmCrD57AemmKpys6aCeZPw1vQkzc=; b=jgWwWwa7nwguVHP8E/H0kL40mtIJGHHQz64K8tE8/mv9uI/opH6H6e97FUaas0zr6f dr8+LAiVB1IFEqTn8CRHISEMxueB9PE/dctAB/0i6Pxp/8ZSJTVWiwBwd8ZcREB+t8bl Vuvz0dzZ890xH9YUzXBgVmR6nBlqgx8Z3n4m5/l4HcsHAADYr9K5MsP1E+v76RlhA87A iootOfpzAYK6GzPDIfn3gLxYiUOpHuMFSP4ZwgehL1mHbkpnuUe6q34DOnw2bZ6Mt28I lWUvXcevpy0UyWSB50Bm8EWjNlV2ITTlux2jSbPEa0gmjU5SWwpb0o27kEP3v76gFV4s jWAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:message-id:date :subject:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=B3pPfVMpUiPSyCCzmCrD57AemmKpys6aCeZPw1vQkzc=; b=DH1rCdMudQAKIPOgkIO4CXGMpMVNSpyo8JwejTvZWa5P0dbLL5eUCtrX0WYmancZtY yimkIB5fxIN5/c0t1az6hqaH2dZWcMvetAlul6W6SUAD3U8zzKmPcE/4GPfRXFdAXeTS tayAnfhEtgufaZD/e5Fy46Sc/8jDtWYwv+W6wzpzlWdL6mbOWHhdYHNorEw2GY909o7f 3Kf4JI4n1MXiiUXaFortY7Tv5rEbFp9wpzaGn/Qw5UXrflwI9WUTutyGkoE0SCokEDTo 2FQhWicoCElTvLBx5vaCbx6mHhFzQp2Kfl0kQqcsDSFqEIWcwQD22a7VNDmE08B62KrN 6FJw== X-Gm-Message-State: AO0yUKV8BYNCF6Q9/FCpBoDdPRxVsD3y4oI8437CkjJUICX3AfkjBD/S Z9/uO9htKJubu0gJhoyeFJrBjA== X-Received: by 2002:a17:903:2288:b0:19a:5939:51e3 with SMTP id b8-20020a170903228800b0019a593951e3mr5594520plh.24.1675985081800; Thu, 09 Feb 2023 15:24:41 -0800 (PST) Received: from localhost ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id e18-20020a170902ed9200b0019904abc93dsm2043766plj.250.2023.02.09.15.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Feb 2023 15:24:41 -0800 (PST) Subject: [PATCH] clocksource/drivers/riscv: Refuse to probe on T-Head Date: Thu, 9 Feb 2023 15:23:02 -0800 Message-Id: <20230209232302.25658-1-palmer@rivosinc.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux@rivosinc.com, Palmer Dabbelt <palmer@rivosinc.com> From: Palmer Dabbelt <palmer@rivosinc.com> To: linux-riscv@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757397906472153275?= X-GMAIL-MSGID: =?utf-8?q?1757397906472153275?= |
Series |
clocksource/drivers/riscv: Refuse to probe on T-Head
|
|
Commit Message
Palmer Dabbelt
Feb. 9, 2023, 11:23 p.m. UTC
From: Palmer Dabbelt <palmer@rivosinc.com> As of d9f15a9de44a ("Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"") this driver no longer functions correctly for the T-Head firmware. That shouldn't impact any users, as we've got a functioning driver that's higher priority, but let's just be safe and ban it from probing at all. Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> --- This feel super ugly to me, but I'm not sure how to do this more cleanly. I'm not even sure if it's necessary, but I just ran back into the driver reviewing some other patches so I figured I'd say something. --- drivers/clocksource/timer-riscv.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
Comments
Hi Palmer, On 2/9/23 17:23, Palmer Dabbelt wrote: > From: Palmer Dabbelt <palmer@rivosinc.com> > > As of d9f15a9de44a ("Revert "clocksource/drivers/riscv: Events are > stopped during CPU suspend"") this driver no longer functions correctly > for the T-Head firmware. That shouldn't impact any users, as we've got The current situation is that the C9xx CLINT binding was just accepted, so the CLINT is not yet described in any devicetree. So at least with upstream OpenSBI, which needs the CLINT DT node, the SBI timer extension never worked at all. > a functioning driver that's higher priority, but let's just be safe and > ban it from probing at all. > > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > This feel super ugly to me, but I'm not sure how to do this more > cleanly. I'm not even sure if it's necessary, but I just ran back into > the driver reviewing some other patches so I figured I'd say something. This is not necessary as long as we add the riscv,timer node with the riscv,timer-cannot-wake-cpu property before we add the CLINT node. So it should not be a problem for any C9xx platform going forward. Regards, Samuel > --- > drivers/clocksource/timer-riscv.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index a0d66fabf073..d2d0236d1ae6 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -139,6 +139,22 @@ static int __init riscv_timer_init_dt(struct device_node *n) > if (cpuid != smp_processor_id()) > return 0; > > + /* > + * The T-Head firmware does not route timer interrups to the core > + * during non-retentive suspend. This is allowed by the specifications > + * (no interrupts are required to wake up the core during non-retentive > + * suspend), but most systems don't behave that way and Linux just > + * assumes that interrupts work. > + * > + * There's another timer for the T-Head sytems that behave this way > + * that is already probed by default, but just to be sure skip > + * initializing the SBI driver as it'll just break things later. > + */ > + if (sbi_get_mvendorid() == THEAD_VENDOR_ID) { > + pr_debug_once("Skipping SBI timer on T-Head due to missed wakeups"); > + return 0; > + } > + > domain = NULL; > child = of_get_compatible_child(n, "riscv,cpu-intc"); > if (!child) {
Hey Palmer, On Thu, Feb 09, 2023 at 03:23:02PM -0800, Palmer Dabbelt wrote: > From: Palmer Dabbelt <palmer@rivosinc.com> > > As of d9f15a9de44a ("Revert "clocksource/drivers/riscv: Events are > stopped during CPU suspend"") this driver no longer functions correctly > for the T-Head firmware. That shouldn't impact any users, as we've got > a functioning driver that's higher priority, but let's just be safe and > ban it from probing at all. > > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > This feel super ugly to me, but I'm not sure how to do this more > cleanly. I'm not even sure if it's necessary, but I just ran back into > the driver reviewing some other patches so I figured I'd say something. I'm not super sure what you're trying to fix here. That revert went through to restore behaviour for the SiFive stuff that do deliver events in suspend. Subsequently, we added a DT property (probably the wrong one tbh, but that's all said and done now) that communicates that a timer is incapable of waking the cpus. See commit 98ce3981716c ("dt-bindings: timer: Add bindings for the RISC-V timer device") & the full patchset is at: https://lore.kernel.org/linux-riscv/20230103141102.772228-1-apatel@ventanamicro.com/ AFAIU, the binding for the T-HEAD clint was only accepted in the last week & there's nothing actually using this timer. IIRC, when I wanted to test the timer, Samuel cooked me up a WIP openSBI etc to enable it. So ye, I don't think this is needed fortunately! Cheers, Conor.
On Thu, 09 Feb 2023 15:40:45 PST (-0800), Conor Dooley wrote: > Hey Palmer, > > On Thu, Feb 09, 2023 at 03:23:02PM -0800, Palmer Dabbelt wrote: >> From: Palmer Dabbelt <palmer@rivosinc.com> >> >> As of d9f15a9de44a ("Revert "clocksource/drivers/riscv: Events are >> stopped during CPU suspend"") this driver no longer functions correctly >> for the T-Head firmware. That shouldn't impact any users, as we've got >> a functioning driver that's higher priority, but let's just be safe and >> ban it from probing at all. >> >> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> >> --- >> This feel super ugly to me, but I'm not sure how to do this more >> cleanly. I'm not even sure if it's necessary, but I just ran back into >> the driver reviewing some other patches so I figured I'd say something. > > I'm not super sure what you're trying to fix here. That revert went > through to restore behaviour for the SiFive stuff that do deliver events > in suspend. My worry was that we'd end up probing the SBI driver on T-Head systems, where it doesn't work (as the combination of SBI timer and SBI suspend depends on unspecified behavior). So we'd be better off just failing early and obviously in the case, rather than letting users think they could get away with only the SBI drivers. > Subsequently, we added a DT property (probably the wrong one tbh, but > that's all said and done now) that communicates that a timer is > incapable of waking the cpus. See commit 98ce3981716c ("dt-bindings: > timer: Add bindings for the RISC-V timer device") & the full patchset is > at: > https://lore.kernel.org/linux-riscv/20230103141102.772228-1-apatel@ventanamicro.com/ > > AFAIU, the binding for the T-HEAD clint was only accepted in the last > week & there's nothing actually using this timer. IIRC, when I wanted to > test the timer, Samuel cooked me up a WIP openSBI etc to enable it. That makes sense. I'd assumed these DTs just had the SBI timer in there (as a bunch of other stuff requires it), but from Samuel's reply it sounds like I was just wrong here. I guess we're sort of in a grey area for DTs that aren't in the kernel source tree, but this code is ugly enough I'm OK just ignoring those. > So ye, I don't think this is needed fortunately! Ya, I think so too. > > Cheers, > Conor.
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index a0d66fabf073..d2d0236d1ae6 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -139,6 +139,22 @@ static int __init riscv_timer_init_dt(struct device_node *n) if (cpuid != smp_processor_id()) return 0; + /* + * The T-Head firmware does not route timer interrups to the core + * during non-retentive suspend. This is allowed by the specifications + * (no interrupts are required to wake up the core during non-retentive + * suspend), but most systems don't behave that way and Linux just + * assumes that interrupts work. + * + * There's another timer for the T-Head sytems that behave this way + * that is already probed by default, but just to be sure skip + * initializing the SBI driver as it'll just break things later. + */ + if (sbi_get_mvendorid() == THEAD_VENDOR_ID) { + pr_debug_once("Skipping SBI timer on T-Head due to missed wakeups"); + return 0; + } + domain = NULL; child = of_get_compatible_child(n, "riscv,cpu-intc"); if (!child) {