[v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value
Message ID | 20221024175008.196714-1-rajat.khandelwal@linux.intel.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp83116wru; Sun, 23 Oct 2022 10:54:10 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7Ae6x9GLRZu6w3wCkVtYGRWHzN9O+k/U0IOyc8OMcGnoFy0rGU248iQvMhi9zBeaacb2+G X-Received: by 2002:a63:485f:0:b0:458:764a:2224 with SMTP id x31-20020a63485f000000b00458764a2224mr24666728pgk.620.1666547650604; Sun, 23 Oct 2022 10:54:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666547650; cv=none; d=google.com; s=arc-20160816; b=JFqRgE5w1Jt6iYSg7bk9syL9Nuduo2IPnJSD/Q6+VZoxOrCjLFa2HFHcxQvn3hiTth Hr0n4Kuk0L0IjmlbJTxRAB8m3cLV4H4P1zYt7gcD1JPrrmJuN9GHNZrKOxwaE0gX7Qd7 7/u1LEEdgh0sA7kdjFUyuF89Hrzry9aRW+I9yR+2iMt0EJbgCg6iCn3Vt/st2CaihloZ KOk5aQpKkyFyJh6l28QULowlGCIrSXHjsA79GchZKITEE0sJeWoa83ypcbBrYtjgbj5m F73LKk84CA0VPATfqLd7WQWSPZrEEdGuRiZFWKubgJuQH4oyMv49OsJn2HQXy1DiJqmr Dg+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=3oNXII7DjJloS5MCALG4UvbDFnWYxE4wrO9nnnxKQts=; b=zP1ulHfX/YrKs/QLXw8vT7NkCypyJHRHcA513gSuvRd3F4Y7ZG5HRSyAgBHKCTrQ41 vwb2r1PeTxioyHusQoqwYgSTGZDAmdUkErvt+0tIRxwnVeOm3hnzZa2+CHc8o+YZyTvr yRplM667PsPQN1LJ3pPZRYNesodYDKTGRgNVjIlEj50nL5lyOudzHJCRoF+Q7d34txnz +aSN8e5n8oGRs1kiqMuMzj9RBiib03/Pa6kYG9r7J2NGAkGQEGH4xDNggYvC+a6xhDtB LYE2U+eR0X1FNRk6gOndMOy0ntF3rqk9+ETsKOuMZ0QswhgsJzcrjJCJBhOk02/pFbwR jVDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=S6jBkfiD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v15-20020a63b94f000000b00440a593821esi31480738pgo.523.2022.10.23.10.53.58; Sun, 23 Oct 2022 10:54:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=S6jBkfiD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230360AbiJWRuF (ORCPT <rfc822;pwkd43@gmail.com> + 99 others); Sun, 23 Oct 2022 13:50:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230331AbiJWRuC (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Sun, 23 Oct 2022 13:50:02 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65D5C326DA; Sun, 23 Oct 2022 10:50:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666547401; x=1698083401; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=mG1GlUqs4r9Epxshg2wIumi9qx2R46z0xR8xpQ4Cc9Q=; b=S6jBkfiD+hYozeP71/MAF1XMyZkQdBz2j2CBqRti5n+ccRlu+8ZZ1Oja FiYobh1GNYEqP6taWldDRMyUqgwHTrV04e2S2jsKMCJ3tUwglEDZshvAG k+7U09WFSgFLtVBqw7LmNGqcLZ+NCPmkiqg5IDNgrzAhbaJR8vQF/by2M lqHLOPWRxlOYxDx2mcXTOH4HfX338MyN4hjuHBembnpyre5FwtxX2m/AF fXoSygsXHomdSqFaIPZ77BoposLwZ5w+Za7GW2qhiJpBilEyWf2i0nADC EzmNQxxjcHJupn2lHrEGA1W4bhbG3aKIECxW1vltxlspe3XvUaUCqB2S8 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10509"; a="306018039" X-IronPort-AV: E=Sophos;i="5.95,207,1661842800"; d="scan'208";a="306018039" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2022 10:50:01 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10509"; a="773599326" X-IronPort-AV: E=Sophos;i="5.95,207,1661842800"; d="scan'208";a="773599326" Received: from unknown (HELO rajath-NUC10i7FNH..) ([10.223.165.88]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2022 10:49:58 -0700 From: Rajat Khandelwal <rajat.khandelwal@linux.intel.com> To: jic23@kernel.org, lars@metafoo.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, ihkose@gmail.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, rajat.khandelwal@intel.com, Rajat Khandelwal <rajat.khandelwal@linux.intel.com> Subject: [PATCH v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value Date: Mon, 24 Oct 2022 23:20:08 +0530 Message-Id: <20221024175008.196714-1-rajat.khandelwal@linux.intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DATE_IN_FUTURE_24_48, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747501869423640551?= X-GMAIL-MSGID: =?utf-8?q?1747501869423640551?= |
Series |
[v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value
|
|
Commit Message
Rajat Khandelwal
Oct. 24, 2022, 5:50 p.m. UTC
The datasheet states that the slave address for the device is 0x20
when the pins A0 and A1 are ground. The DT binding has been using
0x10 as the value and I think it should be 0x20 as per datasheet.
Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com>
---
v3:
1. Subject prefix added
2. Improvised 'examples:'
Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On 24/10/2022 13:50, Rajat Khandelwal wrote: > The datasheet states that the slave address for the device is 0x20 > when the pins A0 and A1 are ground. The DT binding has been using > 0x10 as the value and I think it should be 0x20 as per datasheet. > > Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com> > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On Sun, 23 Oct 2022 19:23:09 -0400 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 24/10/2022 13:50, Rajat Khandelwal wrote: > > The datasheet states that the slave address for the device is 0x20 > > when the pins A0 and A1 are ground. The DT binding has been using > > 0x10 as the value and I think it should be 0x20 as per datasheet. > > > > Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com> > > --- > > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > hmm. This is curious. So the datasheet indeed provides a table saying grounding both pins sets the address to 0x20, however take a look at Figure 2 which says the address is A1 | A0 | 1 | 0 | 0 | 0 | 0 or 0x10 as per the example. My guess is someone forgot that i2c addresses are 7 bits and the lowest bit of the first byte is used for R/W control. So unless we have this verified on hardware (implying that the address table is correct in this sense) I'm not keen to take this. I doubt that is the case given it has 8 bit addresses (0xe0) and i2c addresses are 7 bits. Jonathan > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml b/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml index 264fa7c5fe3a..e7c7c103d1dd 100644 --- a/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml +++ b/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml @@ -36,9 +36,9 @@ examples: #address-cells = <1>; #size-cells = <0>; - dac@10 { + dac@20 { compatible = "maxim,ds4424"; - reg = <0x10>; /* When A0, A1 pins are ground */ + reg = <0x20>; /* When A0, A1 pins are ground */ vcc-supply = <&vcc_3v3>; }; };