Message ID | 20230130135802.744743-4-benjamin.gaignard@collabora.com |
---|---|
State | New |
Headers |
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(unknown [IPv6:2a01:e0a:120:3210:e655:2335:9172:6e39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 99C456602ECB; Mon, 30 Jan 2023 13:58:12 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675087093; bh=C/QAyRDA/waqPf4kFAS8tK6asJ/IhGRhX08Vka5WQCc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SfUSiJ2wJQ24d6ulRQN2KZk741WuDEwIFzdvGLpIrVhYp0K9qLF3a3YKV+fxA313D 9umQx9ogVFNwH31/1Uh1VVmbwyQICualFayd0be7aPpbtW6EED/+12WNMzVF3R+BRz rhkm0iTWl1bBNf6OMt3E19vu5DM76y2MxuYKUO0yX/dProNS+SxIQsH+BjB59KmqSR j1L0YvApI6cAviPm8YvkwvCkWJTkavUiBwD/GHCSdhfROXL1WrBUlCz/QV0V8QndOs e5LdNh4r6oXwkw1tr1U8eIFZyue8SQv3gXv8K5ucNbv3b6TlLbqmknOBs34Y1JLP3x 4EHxw5Hj8KzJg== From: Benjamin Gaignard <benjamin.gaignard@collabora.com> To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard <benjamin.gaignard@collabora.com> Subject: [PATCH v6 3/5] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl() Date: Mon, 30 Jan 2023 14:58:00 +0100 Message-Id: <20230130135802.744743-4-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130135802.744743-1-benjamin.gaignard@collabora.com> References: <20230130135802.744743-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756456253902464321?= X-GMAIL-MSGID: =?utf-8?q?1756456253902464321?= |
Series |
media: verisilicon: HEVC: fix 10bits handling
|
|
Commit Message
Benjamin Gaignard
Jan. 30, 2023, 1:58 p.m. UTC
In hantro_try_ctrl() we should only check the values inside
control parameters and not set ctx->bit_depth. That must
be done in controls set function.
Create a set control function for hevc where ctx->bit_depth is
set at the right time.
Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
.../media/platform/verisilicon/hantro_drv.c | 27 ++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
Comments
Hi Benjamin,
I love your patch! Perhaps something to improve:
[auto build test WARNING on media-tree/master]
[also build test WARNING on sailus-media-tree/streams linus/master v6.2-rc6 next-20230130]
[cannot apply to pza/reset/next pza/imx-drm/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Benjamin-Gaignard/media-verisilicon-Do-not-set-context-src-dst-formats-in-reset-functions/20230130-220204
base: git://linuxtv.org/media_tree.git master
patch link: https://lore.kernel.org/r/20230130135802.744743-4-benjamin.gaignard%40collabora.com
patch subject: [PATCH v6 3/5] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl()
config: m68k-allyesconfig (https://download.01.org/0day-ci/archive/20230130/202301302359.3230lcVf-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/aecd2de6feaeb163aa78d82f1172b0020b64b174
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Benjamin-Gaignard/media-verisilicon-Do-not-set-context-src-dst-formats-in-reset-functions/20230130-220204
git checkout aecd2de6feaeb163aa78d82f1172b0020b64b174
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash drivers/media/platform/verisilicon/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/media/platform/verisilicon/hantro_drv.c: In function 'hantro_try_ctrl':
>> drivers/media/platform/verisilicon/hantro_drv.c:254:28: warning: variable 'ctx' set but not used [-Wunused-but-set-variable]
254 | struct hantro_ctx *ctx;
| ^~~
vim +/ctx +254 drivers/media/platform/verisilicon/hantro_drv.c
775fec69008d30 drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c Ezequiel Garcia 2018-12-05 251
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 252 static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 253 {
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 @254 struct hantro_ctx *ctx;
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 255
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 256 ctx = container_of(ctrl->handler,
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 257 struct hantro_ctx, ctrl_handler);
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 258
46a309d2751787 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-11-26 259 if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 260 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 261
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 262 if (sps->chroma_format_idc > 1)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 263 /* Only 4:0:0 and 4:2:0 are supported */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 264 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 265 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 266 /* Luma and chroma bit depth mismatch */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 267 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 268 if (sps->bit_depth_luma_minus8 != 0)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 269 /* Only 8-bit is supported */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 270 return -EINVAL;
b92de2f91821ce drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2022-07-08 271 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) {
8968cfc282955c drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2021-06-03 272 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
8968cfc282955c drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2021-06-03 273
d040a24b5aaede drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 274 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
d040a24b5aaede drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 275 /* Only 8-bit and 10-bit are supported */
df9ec2fc8e70e0 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2022-07-18 276 return -EINVAL;
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 277 } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 278 const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 279
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 280 /* We only support profile 0 */
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 281 if (dec_params->profile != 0)
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 282 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 283 }
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 284 return 0;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 285 }
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 286
Hi Benjamin,
I love your patch! Perhaps something to improve:
[auto build test WARNING on media-tree/master]
[also build test WARNING on sailus-media-tree/streams linus/master pza/reset/next]
[cannot apply to pza/imx-drm/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Benjamin-Gaignard/media-verisilicon-Do-not-set-context-src-dst-formats-in-reset-functions/20230130-220204
base: git://linuxtv.org/media_tree.git master
patch link: https://lore.kernel.org/r/20230130135802.744743-4-benjamin.gaignard%40collabora.com
patch subject: [PATCH v6 3/5] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl()
config: arm64-randconfig-r005-20230202 (https://download.01.org/0day-ci/archive/20230203/202302030526.YN9Piae4-lkp@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 4196ca3278f78c6e19246e54ab0ecb364e37d66a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/aecd2de6feaeb163aa78d82f1172b0020b64b174
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Benjamin-Gaignard/media-verisilicon-Do-not-set-context-src-dst-formats-in-reset-functions/20230130-220204
git checkout aecd2de6feaeb163aa78d82f1172b0020b64b174
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/media/platform/verisilicon/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/media/platform/verisilicon/hantro_drv.c:254:21: warning: variable 'ctx' set but not used [-Wunused-but-set-variable]
struct hantro_ctx *ctx;
^
1 warning generated.
vim +/ctx +254 drivers/media/platform/verisilicon/hantro_drv.c
775fec69008d30 drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c Ezequiel Garcia 2018-12-05 251
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 252 static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 253 {
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 @254 struct hantro_ctx *ctx;
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 255
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 256 ctx = container_of(ctrl->handler,
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 257 struct hantro_ctx, ctrl_handler);
4bec03301ecd81 drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 258
46a309d2751787 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-11-26 259 if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 260 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 261
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 262 if (sps->chroma_format_idc > 1)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 263 /* Only 4:0:0 and 4:2:0 are supported */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 264 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 265 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 266 /* Luma and chroma bit depth mismatch */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 267 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 268 if (sps->bit_depth_luma_minus8 != 0)
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 269 /* Only 8-bit is supported */
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 270 return -EINVAL;
b92de2f91821ce drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2022-07-08 271 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) {
8968cfc282955c drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2021-06-03 272 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
8968cfc282955c drivers/staging/media/hantro/hantro_drv.c Benjamin Gaignard 2021-06-03 273
d040a24b5aaede drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 274 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
d040a24b5aaede drivers/media/platform/verisilicon/hantro_drv.c Benjamin Gaignard 2022-08-29 275 /* Only 8-bit and 10-bit are supported */
df9ec2fc8e70e0 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2022-07-18 276 return -EINVAL;
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 277 } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 278 const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 279
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 280 /* We only support profile 0 */
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 281 if (dec_params->profile != 0)
e2da465455ce48 drivers/staging/media/hantro/hantro_drv.c Andrzej Pietrasiewicz 2021-11-16 282 return -EINVAL;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 283 }
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 284 return 0;
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 285 }
d70cca73234420 drivers/staging/media/hantro/hantro_drv.c Ezequiel Garcia 2020-07-09 286
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 8cb4a68c9119..715075f15596 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -274,8 +274,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) /* Only 8-bit and 10-bit are supported */ return -EINVAL; - - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8; } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; @@ -324,6 +322,24 @@ static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_HEVC_SPS: + ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8; + break; + default: + return -EINVAL; + } + + return 0; +} + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; @@ -336,6 +352,11 @@ static const struct v4l2_ctrl_ops hantro_vp9_ctrl_ops = { .s_ctrl = hantro_vp9_s_ctrl, }; +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { + .try_ctrl = hantro_try_ctrl, + .s_ctrl = hantro_hevc_s_ctrl, +}; + #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \ V4L2_JPEG_ACTIVE_MARKER_COM | \ V4L2_JPEG_ACTIVE_MARKER_DQT | \ @@ -470,7 +491,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_HEVC_DECODER, .cfg = { .id = V4L2_CID_STATELESS_HEVC_SPS, - .ops = &hantro_ctrl_ops, + .ops = &hantro_hevc_ctrl_ops, }, }, { .codec = HANTRO_HEVC_DECODER,