[5/6] tty: serial: fsl_lpuart: set RTS watermark for lpuart

Message ID 20230130064449.9564-6-sherry.sun@nxp.com
State New
Headers
Series tty: serial: fsl_lpuart: improve RXWATER setting and add imx8ulp support |

Commit Message

Sherry Sun Jan. 30, 2023, 6:44 a.m. UTC
  Add RTS watermark support for LPUART. The RX RTS_B output negates when
the number of empty words in the receive FIFO is greater or equal to
RTSWATER. Here set the RTSWATER to half of the rxfifo_size.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 drivers/tty/serial/fsl_lpuart.c | 8 ++++++++
 1 file changed, 8 insertions(+)
  

Comments

Alexander Stein Feb. 2, 2023, 7:14 a.m. UTC | #1
Am Montag, 30. Januar 2023, 07:44:48 CET schrieb Sherry Sun:
> Add RTS watermark support for LPUART. The RX RTS_B output negates when
> the number of empty words in the receive FIFO is greater or equal to
> RTSWATER. Here set the RTSWATER to half of the rxfifo_size.
> 
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
>  drivers/tty/serial/fsl_lpuart.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/tty/serial/fsl_lpuart.c
> b/drivers/tty/serial/fsl_lpuart.c index 2789749d3d0d..c35e49a09bcc 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -201,6 +201,7 @@
>  #define UARTDATA_MASK		0x3ff
> 
>  #define UARTMODIR_IREN		0x00020000
> +#define UARTMODIR_RTSWATER	GENMASK(10, 8)
>  #define UARTMODIR_TXCTSSRC	0x00000020
>  #define UARTMODIR_TXCTSC	0x00000010
>  #define UARTMODIR_RXRTSE	0x00000008
> @@ -1573,6 +1574,13 @@ static void lpuart32_setup_watermark(struct
> lpuart_port *sport) (0x0 << UARTWATER_TXWATER_OFF);
>  	lpuart32_write(&sport->port, val, UARTWATER);
> 
> +	/* set RTS watermark */
> +	if (!uart_console(&sport->port)) {
> +		val = lpuart32_read(&sport->port, UARTMODIR);
> +		val |= FIELD_PREP(UARTMODIR_RTSWATER, sport->rxfifo_size 
>> 1);
> +		lpuart32_write(&sport->port, val, UARTMODIR);

On LS1021A these bits are reserved (please refer to QorIQ LS1021A Reference 
manual Rev 3.1 02/2020 section 27.3.6). Is it okay to write to them?

Best regards
Alexander

> +	}
> +
>  	/* Restore cr2 */
>  	lpuart32_write(&sport->port, ctrl_saved, UARTCTRL);
>  }
  
Sherry Sun Feb. 2, 2023, 7:56 a.m. UTC | #2
> -----Original Message-----
> From: Alexander Stein <alexander.stein@ew.tq-group.com>
> Sent: 2023年2月2日 15:14
> To: Sherry Sun <sherry.sun@nxp.com>
> Cc: gregkh@linuxfoundation.org; jirislaby@kernel.org; linux-
> serial@vger.kernel.org; linux-kernel@vger.kernel.org; dl-linux-imx <linux-
> imx@nxp.com>
> Subject: Re: [PATCH 5/6] tty: serial: fsl_lpuart: set RTS watermark for lpuart
> 
> Am Montag, 30. Januar 2023, 07:44:48 CET schrieb Sherry Sun:
> > Add RTS watermark support for LPUART. The RX RTS_B output negates
> when
> > the number of empty words in the receive FIFO is greater or equal to
> > RTSWATER. Here set the RTSWATER to half of the rxfifo_size.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> >  drivers/tty/serial/fsl_lpuart.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/tty/serial/fsl_lpuart.c
> > b/drivers/tty/serial/fsl_lpuart.c index 2789749d3d0d..c35e49a09bcc
> > 100644
> > --- a/drivers/tty/serial/fsl_lpuart.c
> > +++ b/drivers/tty/serial/fsl_lpuart.c
> > @@ -201,6 +201,7 @@
> >  #define UARTDATA_MASK		0x3ff
> >
> >  #define UARTMODIR_IREN		0x00020000
> > +#define UARTMODIR_RTSWATER	GENMASK(10, 8)
> >  #define UARTMODIR_TXCTSSRC	0x00000020
> >  #define UARTMODIR_TXCTSC	0x00000010
> >  #define UARTMODIR_RXRTSE	0x00000008
> > @@ -1573,6 +1574,13 @@ static void lpuart32_setup_watermark(struct
> > lpuart_port *sport) (0x0 << UARTWATER_TXWATER_OFF);
> >  	lpuart32_write(&sport->port, val, UARTWATER);
> >
> > +	/* set RTS watermark */
> > +	if (!uart_console(&sport->port)) {
> > +		val = lpuart32_read(&sport->port, UARTMODIR);
> > +		val |= FIELD_PREP(UARTMODIR_RTSWATER, sport-
> >rxfifo_size
> >> 1);
> > +		lpuart32_write(&sport->port, val, UARTMODIR);
> 
> On LS1021A these bits are reserved (please refer to QorIQ LS1021A Reference
> manual Rev 3.1 02/2020 section 27.3.6). Is it okay to write to them?
> 
Hi Alexander,

I checked the LS1021A RM, writing the reserved register bits have no impact, so it is okay here.
Also, nxp local linux repo add this patch for a long time, all imx and layerscape boards work well with this patch.

Best Regards
Sherry
  

Patch

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 2789749d3d0d..c35e49a09bcc 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -201,6 +201,7 @@ 
 #define UARTDATA_MASK		0x3ff
 
 #define UARTMODIR_IREN		0x00020000
+#define UARTMODIR_RTSWATER	GENMASK(10, 8)
 #define UARTMODIR_TXCTSSRC	0x00000020
 #define UARTMODIR_TXCTSC	0x00000010
 #define UARTMODIR_RXRTSE	0x00000008
@@ -1573,6 +1574,13 @@  static void lpuart32_setup_watermark(struct lpuart_port *sport)
 	      (0x0 << UARTWATER_TXWATER_OFF);
 	lpuart32_write(&sport->port, val, UARTWATER);
 
+	/* set RTS watermark */
+	if (!uart_console(&sport->port)) {
+		val = lpuart32_read(&sport->port, UARTMODIR);
+		val |= FIELD_PREP(UARTMODIR_RTSWATER, sport->rxfifo_size >> 1);
+		lpuart32_write(&sport->port, val, UARTMODIR);
+	}
+
 	/* Restore cr2 */
 	lpuart32_write(&sport->port, ctrl_saved, UARTCTRL);
 }