[v2,1/5] brcmfmac: Drop all the RAW device IDs

  These device IDs are only supposed to be visible internally, in devices
without a proper OTP. They should never be seen in devices in the wild,
so drop them to avoid confusion.

Signed-off-by: Hector Martin <marcan@marcan.st>
---
 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c       | 4 ----
 drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h | 4 ----
 2 files changed, 8 deletions(-)
  

On 1/31/2023 12:28 PM, 'Hector Martin' via BRCM80211-DEV-LIST,PDL wrote:
> These device IDs are only supposed to be visible internally, in devices
> without a proper OTP. They should never be seen in devices in the wild,
> so drop them to avoid confusion.

Thanks for this cleanup.

Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>
> Signed-off-by: Hector Martin <marcan@marcan.st>
> ---
>   drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c       | 4 ----
>   drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h | 4 ----
>   2 files changed, 8 deletions(-)
> 
> diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> index ae57a9a3ab05..93f961d484c3 100644
> --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> @@ -2589,17 +2589,14 @@ static const struct dev_pm_ops brcmf_pciedrvr_pm = {
>   static const struct pci_device_id brcmf_pcie_devid_table[] = {
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4350_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE_SUB(0x4355, BRCM_PCIE_VENDOR_ID_BROADCOM, 0x4355, WCC),
> -	BRCMF_PCIE_DEVICE(BRCM_PCIE_4354_RAW_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4356_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_43567_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_43570_DEVICE_ID, WCC),
> -	BRCMF_PCIE_DEVICE(BRCM_PCIE_43570_RAW_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4358_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4359_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_2G_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_5G_DEVICE_ID, WCC),
> -	BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_RAW_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4364_DEVICE_ID, BCA),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4365_DEVICE_ID, BCA),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4365_2G_DEVICE_ID, BCA),
> @@ -2611,7 +2608,6 @@ static const struct pci_device_id brcmf_pcie_devid_table[] = {
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4371_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(BRCM_PCIE_4378_DEVICE_ID, WCC),
>   	BRCMF_PCIE_DEVICE(CY_PCIE_89459_DEVICE_ID, CYW),
> -	BRCMF_PCIE_DEVICE(CY_PCIE_89459_RAW_DEVICE_ID, CYW),
>   	{ /* end: all zeroes */ }
>   };
>   
> diff --git a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
> index f4939cf62767..a211a72fca42 100644
> --- a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
> +++ b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
> @@ -71,17 +71,14 @@
>   /* PCIE Device IDs */
>   #define BRCM_PCIE_4350_DEVICE_ID	0x43a3
>   #define BRCM_PCIE_4354_DEVICE_ID	0x43df
> -#define BRCM_PCIE_4354_RAW_DEVICE_ID	0x4354
>   #define BRCM_PCIE_4356_DEVICE_ID	0x43ec
>   #define BRCM_PCIE_43567_DEVICE_ID	0x43d3
>   #define BRCM_PCIE_43570_DEVICE_ID	0x43d9
> -#define BRCM_PCIE_43570_RAW_DEVICE_ID	0xaa31
>   #define BRCM_PCIE_4358_DEVICE_ID	0x43e9
>   #define BRCM_PCIE_4359_DEVICE_ID	0x43ef
>   #define BRCM_PCIE_43602_DEVICE_ID	0x43ba
>   #define BRCM_PCIE_43602_2G_DEVICE_ID	0x43bb
>   #define BRCM_PCIE_43602_5G_DEVICE_ID	0x43bc
> -#define BRCM_PCIE_43602_RAW_DEVICE_ID	43602
>   #define BRCM_PCIE_4364_DEVICE_ID	0x4464
>   #define BRCM_PCIE_4365_DEVICE_ID	0x43ca
>   #define BRCM_PCIE_4365_2G_DEVICE_ID	0x43cb
> @@ -92,7 +89,6 @@
>   #define BRCM_PCIE_4371_DEVICE_ID	0x440d
>   #define BRCM_PCIE_4378_DEVICE_ID	0x4425
>   #define CY_PCIE_89459_DEVICE_ID         0x4415
> -#define CY_PCIE_89459_RAW_DEVICE_ID     0x4355
>   
>   /* brcmsmac IDs */
>   #define BCM4313_D11N2G_ID	0x4727	/* 4313 802.11n 2.4G device */
  

On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>
> These device IDs are only supposed to be visible internally, in devices
> without a proper OTP. They should never be seen in devices in the wild,
> so drop them to avoid confusion.

I think these can still show up in embedded platforms where the
OTP/SPROM is provided on-flash.

E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:

[    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
[    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
[    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
[    3.237302] pci 0000:01:00.0: supports D1 D2
...
[    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
[    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
[    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
[    3.782649] pci 0001:03:00.0: supports D1 D2

0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)

Rafał can probably provide more info there.

Regards
Jonas
  

On 31/01/2023 23.17, Jonas Gorski wrote:
> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>
>> These device IDs are only supposed to be visible internally, in devices
>> without a proper OTP. They should never be seen in devices in the wild,
>> so drop them to avoid confusion.
> 
> I think these can still show up in embedded platforms where the
> OTP/SPROM is provided on-flash.
> 
> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
> 
> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
> [    3.237302] pci 0000:01:00.0: supports D1 D2
> ...
> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
> [    3.782649] pci 0001:03:00.0: supports D1 D2
> 
> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
> 
> Rafał can probably provide more info there.
> 
> Regards
> Jonas
> 

Arend, any comments on these platforms?

- Hector
  

On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL" 
<brcm80211-dev-list.pdl@broadcom.com> wrote:

> On 31/01/2023 23.17, Jonas Gorski wrote:
>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>
>>> These device IDs are only supposed to be visible internally, in devices
>>> without a proper OTP. They should never be seen in devices in the wild,
>>> so drop them to avoid confusion.
>>
>> I think these can still show up in embedded platforms where the
>> OTP/SPROM is provided on-flash.
>>
>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>
>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>> ...
>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>
>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>
>> Rafał can probably provide more info there.
>>
>> Regards
>> Jonas
>
> Arend, any comments on these platforms?

Huh? I already replied to that couple of days ago or did I only imagine 
doing that.

Regards,
Arend
  

On 03/02/2023 02.19, Arend Van Spriel wrote:
> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL" 
> <brcm80211-dev-list.pdl@broadcom.com> wrote:
> 
>> On 31/01/2023 23.17, Jonas Gorski wrote:
>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>>
>>>> These device IDs are only supposed to be visible internally, in devices
>>>> without a proper OTP. They should never be seen in devices in the wild,
>>>> so drop them to avoid confusion.
>>>
>>> I think these can still show up in embedded platforms where the
>>> OTP/SPROM is provided on-flash.
>>>
>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>>
>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>>> ...
>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>>
>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>>
>>> Rafał can probably provide more info there.
>>>
>>> Regards
>>> Jonas
>>
>> Arend, any comments on these platforms?
> 
> Huh? I already replied to that couple of days ago or did I only imagine 
> doing that.

I don't see any replies from you on the lists (or my inbox) to Jonas' email.

- Hector
  

- stale Cypress emails

On February 5, 2023 3:50:41 AM Hector Martin <marcan@marcan.st> wrote:

> On 03/02/2023 02.19, Arend Van Spriel wrote:
>> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL"
>> <brcm80211-dev-list.pdl@broadcom.com> wrote:
>>
>>> On 31/01/2023 23.17, Jonas Gorski wrote:
>>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>>>
>>>>> These device IDs are only supposed to be visible internally, in devices
>>>>> without a proper OTP. They should never be seen in devices in the wild,
>>>>> so drop them to avoid confusion.
>>>>
>>>> I think these can still show up in embedded platforms where the
>>>> OTP/SPROM is provided on-flash.
>>>>
>>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>>>
>>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>>>> ...
>>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>>>
>>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>>>
>>>> Rafał can probably provide more info there.
>>>>
>>>> Regards
>>>> Jonas
>>>
>>> Arend, any comments on these platforms?
>>
>> Huh? I already replied to that couple of days ago or did I only imagine
>> doing that.
>
> I don't see any replies from you on the lists (or my inbox) to Jonas' email.

Accidentally sent that reply to internal mailing list. So quoting myself here:

"""
Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided 
on-flash"? I assume you mean that it is on the host side and the wifi PCIe 
device can not access it when it gets powered up. Maybe for this scenario 
we should have a devicetree compatible to configure the device id, but that 
does not help any current users of these platforms. Thanks for providing 
this info.
"""

Regards,
Arend
  

On Sun, 5 Feb 2023 at 07:58, Arend Van Spriel
<arend.vanspriel@broadcom.com> wrote:
>
> - stale Cypress emails
>
> On February 5, 2023 3:50:41 AM Hector Martin <marcan@marcan.st> wrote:
>
> > On 03/02/2023 02.19, Arend Van Spriel wrote:
> >> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL"
> >> <brcm80211-dev-list.pdl@broadcom.com> wrote:
> >>
> >>> On 31/01/2023 23.17, Jonas Gorski wrote:
> >>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
> >>>>>
> >>>>> These device IDs are only supposed to be visible internally, in devices
> >>>>> without a proper OTP. They should never be seen in devices in the wild,
> >>>>> so drop them to avoid confusion.
> >>>>
> >>>> I think these can still show up in embedded platforms where the
> >>>> OTP/SPROM is provided on-flash.
> >>>>
> >>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
> >>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
> >>>>
> >>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
> >>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
> >>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
> >>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
> >>>> ...
> >>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
> >>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
> >>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
> >>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
> >>>>
> >>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
> >>>>
> >>>> Rafał can probably provide more info there.
> >>>>
> >>>> Regards
> >>>> Jonas
> >>>
> >>> Arend, any comments on these platforms?
> >>
> >> Huh? I already replied to that couple of days ago or did I only imagine
> >> doing that.
> >
> > I don't see any replies from you on the lists (or my inbox) to Jonas' email.
>
> Accidentally sent that reply to internal mailing list. So quoting myself here:
>
> """
> Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided
> on-flash"? I assume you mean that it is on the host side and the wifi PCIe
> device can not access it when it gets powered up. Maybe for this scenario
> we should have a devicetree compatible to configure the device id, but that
> does not help any current users of these platforms. Thanks for providing
> this info.

That's what I meant, the wifi chip itself does not have any (valid)
OTP/SPROM attached/populated, and requires the driver to setup the
values at runtime based on the host SoC's flash contents (most likely
NVRAM contents).

This was the case in about 99% of embedded systems based on MIPS
bcm47xx/bcm63xx, where the wifi chips then always identified
themselves with their raw chip IDs as PCI device IDs (even leading to
one or two ID conflicts ...).

I have to admit I don't know how much this is still an issue on
current (ARM) systems, but at least that one BCM4709A one suggests
this is still happening in "recent" designs. Probably because it saves
half a cent per board or so ;-)

Regards
Jonas
  

On 05/02/2023 21.44, Jonas Gorski wrote:
> On Sun, 5 Feb 2023 at 07:58, Arend Van Spriel
> <arend.vanspriel@broadcom.com> wrote:
>>
>> - stale Cypress emails
>>
>> On February 5, 2023 3:50:41 AM Hector Martin <marcan@marcan.st> wrote:
>>
>>> On 03/02/2023 02.19, Arend Van Spriel wrote:
>>>> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL"
>>>> <brcm80211-dev-list.pdl@broadcom.com> wrote:
>>>>
>>>>> On 31/01/2023 23.17, Jonas Gorski wrote:
>>>>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>>>>>
>>>>>>> These device IDs are only supposed to be visible internally, in devices
>>>>>>> without a proper OTP. They should never be seen in devices in the wild,
>>>>>>> so drop them to avoid confusion.
>>>>>>
>>>>>> I think these can still show up in embedded platforms where the
>>>>>> OTP/SPROM is provided on-flash.
>>>>>>
>>>>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>>>>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>>>>>
>>>>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>>>>>> ...
>>>>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>>>>>
>>>>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>>>>>
>>>>>> Rafał can probably provide more info there.
>>>>>>
>>>>>> Regards
>>>>>> Jonas
>>>>>
>>>>> Arend, any comments on these platforms?
>>>>
>>>> Huh? I already replied to that couple of days ago or did I only imagine
>>>> doing that.
>>>
>>> I don't see any replies from you on the lists (or my inbox) to Jonas' email.
>>
>> Accidentally sent that reply to internal mailing list. So quoting myself here:
>>
>> """
>> Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided
>> on-flash"? I assume you mean that it is on the host side and the wifi PCIe
>> device can not access it when it gets powered up. Maybe for this scenario
>> we should have a devicetree compatible to configure the device id, but that
>> does not help any current users of these platforms. Thanks for providing
>> this info.
> 
> That's what I meant, the wifi chip itself does not have any (valid)
> OTP/SPROM attached/populated, and requires the driver to setup the
> values at runtime based on the host SoC's flash contents (most likely
> NVRAM contents).
> 
> This was the case in about 99% of embedded systems based on MIPS
> bcm47xx/bcm63xx, where the wifi chips then always identified
> themselves with their raw chip IDs as PCI device IDs (even leading to
> one or two ID conflicts ...).
> 
> I have to admit I don't know how much this is still an issue on
> current (ARM) systems, but at least that one BCM4709A one suggests
> this is still happening in "recent" designs. Probably because it saves
> half a cent per board or so ;-)
> 
> Regards
> Jonas
> 

As far as I know the OTP is built into the chips themselves, and even
Apple (who refuses to put per-device calibration data in OTP these days
and loads it from DT) still manages to burn in the proper device ID and
basic info at least... so I'm not sure how this saves any money. I
thought chips weren't supposed to even leave Broadcom without at least
an ID burned in?

- Hector
  

On 05/02/2023 22.02, Hector Martin wrote:
> On 05/02/2023 21.44, Jonas Gorski wrote:
>> On Sun, 5 Feb 2023 at 07:58, Arend Van Spriel
>> <arend.vanspriel@broadcom.com> wrote:
>>>
>>> - stale Cypress emails
>>>
>>> On February 5, 2023 3:50:41 AM Hector Martin <marcan@marcan.st> wrote:
>>>
>>>> On 03/02/2023 02.19, Arend Van Spriel wrote:
>>>>> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL"
>>>>> <brcm80211-dev-list.pdl@broadcom.com> wrote:
>>>>>
>>>>>> On 31/01/2023 23.17, Jonas Gorski wrote:
>>>>>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>>>>>>
>>>>>>>> These device IDs are only supposed to be visible internally, in devices
>>>>>>>> without a proper OTP. They should never be seen in devices in the wild,
>>>>>>>> so drop them to avoid confusion.
>>>>>>>
>>>>>>> I think these can still show up in embedded platforms where the
>>>>>>> OTP/SPROM is provided on-flash.
>>>>>>>
>>>>>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>>>>>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>>>>>>
>>>>>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>>>>>>> ...
>>>>>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>>>>>>
>>>>>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>>>>>>
>>>>>>> Rafał can probably provide more info there.
>>>>>>>
>>>>>>> Regards
>>>>>>> Jonas
>>>>>>
>>>>>> Arend, any comments on these platforms?
>>>>>
>>>>> Huh? I already replied to that couple of days ago or did I only imagine
>>>>> doing that.
>>>>
>>>> I don't see any replies from you on the lists (or my inbox) to Jonas' email.
>>>
>>> Accidentally sent that reply to internal mailing list. So quoting myself here:
>>>
>>> """
>>> Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided
>>> on-flash"? I assume you mean that it is on the host side and the wifi PCIe
>>> device can not access it when it gets powered up. Maybe for this scenario
>>> we should have a devicetree compatible to configure the device id, but that
>>> does not help any current users of these platforms. Thanks for providing
>>> this info.
>>
>> That's what I meant, the wifi chip itself does not have any (valid)
>> OTP/SPROM attached/populated, and requires the driver to setup the
>> values at runtime based on the host SoC's flash contents (most likely
>> NVRAM contents).
>>
>> This was the case in about 99% of embedded systems based on MIPS
>> bcm47xx/bcm63xx, where the wifi chips then always identified
>> themselves with their raw chip IDs as PCI device IDs (even leading to
>> one or two ID conflicts ...).
>>
>> I have to admit I don't know how much this is still an issue on
>> current (ARM) systems, but at least that one BCM4709A one suggests
>> this is still happening in "recent" designs. Probably because it saves
>> half a cent per board or so ;-)
>>
>> Regards
>> Jonas
>>
> 
> As far as I know the OTP is built into the chips themselves, and even
> Apple (who refuses to put per-device calibration data in OTP these days
> and loads it from DT) still manages to burn in the proper device ID and
> basic info at least... so I'm not sure how this saves any money. I
> thought chips weren't supposed to even leave Broadcom without at least
> an ID burned in?
> 
> - Hector

I'd like to move forward with this. Should I send a v3 without the RAW
ID removal?

- Hector
  

On February 8, 2023 5:02:32 AM Hector Martin <marcan@marcan.st> wrote:

> On 05/02/2023 22.02, Hector Martin wrote:
>> On 05/02/2023 21.44, Jonas Gorski wrote:
>>> On Sun, 5 Feb 2023 at 07:58, Arend Van Spriel
>>> <arend.vanspriel@broadcom.com> wrote:
>>>>
>>>> - stale Cypress emails
>>>>
>>>> On February 5, 2023 3:50:41 AM Hector Martin <marcan@marcan.st> wrote:
>>>>
>>>>> On 03/02/2023 02.19, Arend Van Spriel wrote:
>>>>>> On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL"
>>>>>> <brcm80211-dev-list.pdl@broadcom.com> wrote:
>>>>>>
>>>>>>> On 31/01/2023 23.17, Jonas Gorski wrote:
>>>>>>>> On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@marcan.st> wrote:
>>>>>>>>>
>>>>>>>>> These device IDs are only supposed to be visible internally, in devices
>>>>>>>>> without a proper OTP. They should never be seen in devices in the wild,
>>>>>>>>> so drop them to avoid confusion.
>>>>>>>>
>>>>>>>> I think these can still show up in embedded platforms where the
>>>>>>>> OTP/SPROM is provided on-flash.
>>>>>>>>
>>>>>>>> E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4
>>>>>>>> shows this bootlog on an BCM4709A0 router with two BCM43602 wifis:
>>>>>>>>
>>>>>>>> [    3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>>>> [    3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>>>> [    3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>>>> [    3.237302] pci 0000:01:00.0: supports D1 D2
>>>>>>>> ...
>>>>>>>> [    3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000
>>>>>>>> [    3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
>>>>>>>> [    3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit]
>>>>>>>> [    3.782649] pci 0001:03:00.0: supports D1 D2
>>>>>>>>
>>>>>>>> 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID)
>>>>>>>>
>>>>>>>> Rafał can probably provide more info there.
>>>>>>>>
>>>>>>>> Regards
>>>>>>>> Jonas
>>>>>>>
>>>>>>> Arend, any comments on these platforms?
>>>>>>
>>>>>> Huh? I already replied to that couple of days ago or did I only imagine
>>>>>> doing that.
>>>>>
>>>>> I don't see any replies from you on the lists (or my inbox) to Jonas' email.
>>>>
>>>> Accidentally sent that reply to internal mailing list. So quoting myself here:
>>>>
>>>> """
>>>> Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided
>>>> on-flash"? I assume you mean that it is on the host side and the wifi PCIe
>>>> device can not access it when it gets powered up. Maybe for this scenario
>>>> we should have a devicetree compatible to configure the device id, but that
>>>> does not help any current users of these platforms. Thanks for providing
>>>> this info.
>>>
>>> That's what I meant, the wifi chip itself does not have any (valid)
>>> OTP/SPROM attached/populated, and requires the driver to setup the
>>> values at runtime based on the host SoC's flash contents (most likely
>>> NVRAM contents).
>>>
>>> This was the case in about 99% of embedded systems based on MIPS
>>> bcm47xx/bcm63xx, where the wifi chips then always identified
>>> themselves with their raw chip IDs as PCI device IDs (even leading to
>>> one or two ID conflicts ...).
>>>
>>> I have to admit I don't know how much this is still an issue on
>>> current (ARM) systems, but at least that one BCM4709A one suggests
>>> this is still happening in "recent" designs. Probably because it saves
>>> half a cent per board or so ;-)
>>>
>>> Regards
>>> Jonas
>>
>> As far as I know the OTP is built into the chips themselves, and even
>> Apple (who refuses to put per-device calibration data in OTP these days
>> and loads it from DT) still manages to burn in the proper device ID and
>> basic info at least... so I'm not sure how this saves any money. I
>> thought chips weren't supposed to even leave Broadcom without at least
>> an ID burned in?
>>
>> - Hector
>
> I'd like to move forward with this. Should I send a v3 without the RAW
> ID removal?

Yeah. Need to consider the options for solving this.

Programming the OTP is a manufacturing step done by OEM so I think they 
save having to implement that step in production and it is not so much chip 
cost saving.

Our proprietary driver is setup so it is probed for any PCI device with 
network class and then it uses NVRAM to obtain the PCI devid.

Regards,
Arend