[v6,3/6] arm64: dts: Add i.MX8MQ PCIe EP support
Commit Message
Add i.MX8MQ PCIe EP support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 +++++++++++++++++++++++
1 file changed, 32 insertions(+)
Comments
On 20/01/2023 06:25, Richard Zhu wrote:
> Add i.MX8MQ PCIe EP support.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 +++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 98fbba4c99a9..e1ffb7c9586d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
> status = "disabled";
> };
>
> + pcie1_ep: pcie_ep@33c00000 {
Eh...
Best regards,
Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: 2023年1月20日 16:09
> To: Hongxing Zhu <hongxing.zhu@nxp.com>; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; shawnguo@kernel.org; Peng Fan
> <peng.fan@nxp.com>; marex@denx.de; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>; tharvey@gateworks.com; Frank Li
> <frank.li@nxp.com>
> Cc: lorenzo.pieralisi@arm.com; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v6 3/6] arm64: dts: Add i.MX8MQ PCIe EP support
>
> On 20/01/2023 06:25, Richard Zhu wrote:
> > Add i.MX8MQ PCIe EP support.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32
> +++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 98fbba4c99a9..e1ffb7c9586d 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
> > status = "disabled";
> > };
> >
> > + pcie1_ep: pcie_ep@33c00000 {
>
> Eh...
Would replace the underscore by hyphen.
Thanks.
Best Regards
Richard Zhu
>
> Best regards,
> Krzysztof
@@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
status = "disabled";
};
+ pcie1_ep: pcie_ep@33c00000 {
+ compatible = "fsl,imx8mq-pcie-ep";
+ reg = <0x33c00000 0x000400000>,
+ <0x20000000 0x08000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIEPHY2>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>;
+ reset-names = "pciephy", "apps", "turnoff";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
+ <&clk IMX8MQ_SYS2_PLL_100M>,
+ <&clk IMX8MQ_SYS1_PLL_80M>;
+ assigned-clock-rates = <250000000>, <100000000>,
+ <10000000>;
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */