[v7,1/2] dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema

Message ID 20221020101402.1856818-2-joy.zou@nxp.com
State New
Headers
Series dmaengine: sdma support hdmi audio |

Commit Message

Joy Zou Oct. 20, 2022, 10:14 a.m. UTC
  Convert the i.MX SDMA binding to DT schema format using json-schema.

The compatibles fsl,imx31-to1-sdma, fsl,imx31-to2-sdma, fsl,imx35-to1-sdma
and fsl,imx35-to2-sdma are not used. So need to delete it. The compatibles
fsl,imx50-sdma, fsl,imx6sll-sdma and fsl,imx6sl-sdma are added. The
original binding don't list all compatible used.

In addition, add new peripheral types HDMI Audio.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
---
Changes in v6:
delete tag Acked-by from commit message.

Changes in v5:
modify the commit message fromat.
add additionalProperties, because delete the quotes in patch v4.
delete unevaluatedProperties due to similar to additionalProperties.
modification fsl,sdma-event-remap items and description.

Changes in v4:
modify the commit message.
delete the quotes in patch.
modify the compatible in patch.
delete maxitems and add items for clock-names property.
add iram property.

Changes in v3:
modify the commit message.
modify the filename.
modify the maintainer.
delete the unnecessary comment.
modify the compatible and run dt_binding_check and dtbs_check.
add clocks and clock-names property.
delete the reg description and add maxItems.
delete the interrupts description and add maxItems.
add ref for gpr property.
modify the fsl,sdma-event-remap ref type and add items.
delete consumer example.

Changes in v2:
convert imx sdma bindings to DT schema.
---
 .../devicetree/bindings/dma/fsl,imx-sdma.yaml | 147 ++++++++++++++++++
 .../devicetree/bindings/dma/fsl-imx-sdma.txt  | 118 --------------
 2 files changed, 147 insertions(+), 118 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
 delete mode 100644 Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
  

Comments

Krzysztof Kozlowski Oct. 20, 2022, 4:31 p.m. UTC | #1
On 20/10/2022 06:14, Joy Zou wrote:
> Convert the i.MX SDMA binding to DT schema format using json-schema.
> 


> ---
>  .../devicetree/bindings/dma/fsl,imx-sdma.yaml | 147 ++++++++++++++++++
>  .../devicetree/bindings/dma/fsl-imx-sdma.txt  | 118 --------------
>  2 files changed, 147 insertions(+), 118 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
>  delete mode 100644 Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> 
> diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> new file mode 100644
> index 000000000000..3da65d3ea4af
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> @@ -0,0 +1,147 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
> +
> +maintainers:
> +  - Joy Zou <joy.zou@nxp.com>
> +

You need to reference dma-controller.yaml schema.

> +properties:
> +  compatible:
> +    oneOf:


(...)

> +
> +  gpr:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: The phandle to the General Purpose Register (GPR) node
> +
> +  fsl,sdma-event-remap:
> +    $ref: /schemas/types.yaml#/definitions/uint32-matrix
> +    maxItems: 2
> +    items:
> +      items:
> +        - description: GPR register offset
> +        - description: GPR register shift
> +        - description: GPR register value
> +    description: |
> +      Register bits of sdma event remap, the format is <reg shift val>.
> +      The order is <RX>, <TX>.
> +
> +  clocks:
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: ipg
> +      - const: ahb
> +
> +  iram:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: The phandle to the On-chip RAM (OCRAM) node.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - fsl,sdma-ram-script-name
> +  - "#dma-cells"

and then this can one be dropped.

> +
> +additionalProperties: false

Best regards,
Krzysztof
  
Joy Zou Oct. 21, 2022, 8:10 a.m. UTC | #2
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: 2022年10月21日 0:32
> To: Joy Zou <joy.zou@nxp.com>; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com
> Cc: S.J. Wang <shengjiu.wang@nxp.com>; martink@posteo.de;
> dev@lynxeye.de; alexander.stein@ew.tq-group.com; Peng Fan
> <peng.fan@nxp.com>; david@ixit.cz; aford173@gmail.com; Hongxing Zhu
> <hongxing.zhu@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH v7 1/2] dt-bindings: fsl-imx-sdma: Convert imx sdma
> to DT schema
> 
> Caution: EXT Email
> 
> On 20/10/2022 06:14, Joy Zou wrote:
> > Convert the i.MX SDMA binding to DT schema format using json-schema.
> >
> 
> 
> > ---
> >  .../devicetree/bindings/dma/fsl,imx-sdma.yaml | 147
> > ++++++++++++++++++  .../devicetree/bindings/dma/fsl-imx-sdma.txt  |
> > 118 --------------
> >  2 files changed, 147 insertions(+), 118 deletions(-)  create mode
> > 100644 Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> >  delete mode 100644
> > Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> >
> > diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> > b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> > new file mode 100644
> > index 000000000000..3da65d3ea4af
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
> > @@ -0,0 +1,147 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fschemas%2Fdma%2Ffsl%2Cimx-sdma.yaml%23&amp;data=05
> %7C01%
> >
> +7Cjoy.zou%40nxp.com%7C405bb49028e340afdc9408dab2b89251%7C686ea
> 1d3bc2b
> >
> +4c6fa92cd99c5c301635%7C0%7C0%7C638018803042580036%7CUnknown
> %7CTWFpbGZ
> >
> +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
> n0%
> >
> +3D%7C3000%7C%7C%7C&amp;sdata=tgNngxTlIBOhIXt0VYJACNM%2FV%2F0
> LWCXyTYVr
> > +rZ5PfoY%3D&amp;reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=05%7C01%7Cjoy.z
> ou%4
> >
> +0nxp.com%7C405bb49028e340afdc9408dab2b89251%7C686ea1d3bc2b4c6
> fa92cd99
> >
> +c5c301635%7C0%7C0%7C638018803042580036%7CUnknown%7CTWFpbG
> Zsb3d8eyJWIj
> >
> +oiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> 000%7
> >
> +C%7C%7C&amp;sdata=MNltJ7MuOpabpjY%2FTdi8IDagtgiFz1vgUCUhs68ChV
> U%3D&am
> > +p;reserved=0
> > +
> > +title: Freescale Smart Direct Memory Access (SDMA) Controller for
> > +i.MX
> > +
> > +maintainers:
> > +  - Joy Zou <joy.zou@nxp.com>
> > +
> 
> You need to reference dma-controller.yaml schema.
Thank you very much for your comments.
I will add the dma-controller quotes.
BR
Joy Zou
> 
> > +properties:
> > +  compatible:
> > +    oneOf:
> 
> 
> (...)
> 
> > +
> > +  gpr:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: The phandle to the General Purpose Register (GPR)
> > + node
> > +
> > +  fsl,sdma-event-remap:
> > +    $ref: /schemas/types.yaml#/definitions/uint32-matrix
> > +    maxItems: 2
> > +    items:
> > +      items:
> > +        - description: GPR register offset
> > +        - description: GPR register shift
> > +        - description: GPR register value
> > +    description: |
> > +      Register bits of sdma event remap, the format is <reg shift val>.
> > +      The order is <RX>, <TX>.
> > +
> > +  clocks:
> > +    maxItems: 2
> > +
> > +  clock-names:
> > +    items:
> > +      - const: ipg
> > +      - const: ahb
> > +
> > +  iram:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: The phandle to the On-chip RAM (OCRAM) node.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - fsl,sdma-ram-script-name
> > +  - "#dma-cells"
> 
> and then this can one be dropped.
Thanks your comments.
I have tried to delete the additionalProperties, but I run dtbs_check. The log as follow:
'oneOf' conditional failed, one must be fixed:
	'unevaluatedProperties' is a required property
	'additionalProperties' is a required property
So I think the property may not be dropped.
BR
Joy Zou
> 
> > +
> > +additionalProperties: false
> 
> Best regards,
> Krzysztof
  
Krzysztof Kozlowski Oct. 21, 2022, 1:03 p.m. UTC | #3
On 21/10/2022 04:10, Joy Zou wrote:
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +  - interrupts
>>> +  - fsl,sdma-ram-script-name
>>> +  - "#dma-cells"
>>
>> and then this can one be dropped.
> Thanks your comments.
> I have tried to delete the additionalProperties, but I run dtbs_check. The log as follow:

Why would you do that? No one asks that. Please read mailing list
netiquette/conversation style.

Best regards,
Krzysztof
  
Joy Zou Oct. 25, 2022, 8:37 a.m. UTC | #4
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: 2022年10月21日 21:04
> To: Joy Zou <joy.zou@nxp.com>; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com
> Cc: S.J. Wang <shengjiu.wang@nxp.com>; martink@posteo.de;
> dev@lynxeye.de; alexander.stein@ew.tq-group.com; Peng Fan
> <peng.fan@nxp.com>; david@ixit.cz; aford173@gmail.com; Hongxing Zhu
> <hongxing.zhu@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [EXT] Re: [PATCH v7 1/2] dt-bindings: fsl-imx-sdma: Convert imx
> sdma to DT schema
> 
> Caution: EXT Email
> 
> On 21/10/2022 04:10, Joy Zou wrote:
> >>> +
> >>> +required:
> >>> +  - compatible
> >>> +  - reg
> >>> +  - interrupts
> >>> +  - fsl,sdma-ram-script-name
> >>> +  - "#dma-cells"
> >>
> >> and then this can one be dropped.
> > Thanks your comments.
> > I have tried to delete the additionalProperties, but I run dtbs_check. The log
> as follow:
> 
> Why would you do that? No one asks that. Please read mailing list
> netiquette/conversation style.
Thank you very much for your comments.
I have changed in patch v8.
BR
Joy Zou
> 
> Best regards,
> Krzysztof
  

Patch

diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
new file mode 100644
index 000000000000..3da65d3ea4af
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
@@ -0,0 +1,147 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
+
+maintainers:
+  - Joy Zou <joy.zou@nxp.com>
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - fsl,imx50-sdma
+              - fsl,imx51-sdma
+              - fsl,imx53-sdma
+              - fsl,imx6q-sdma
+              - fsl,imx7d-sdma
+          - const: fsl,imx35-sdma
+      - items:
+          - enum:
+              - fsl,imx6sx-sdma
+              - fsl,imx6sl-sdma
+          - const: fsl,imx6q-sdma
+      - items:
+          - const: fsl,imx6ul-sdma
+          - const: fsl,imx6q-sdma
+          - const: fsl,imx35-sdma
+      - items:
+          - const: fsl,imx6sll-sdma
+          - const: fsl,imx6ul-sdma
+      - items:
+          - const: fsl,imx8mq-sdma
+          - const: fsl,imx7d-sdma
+      - items:
+          - enum:
+              - fsl,imx8mp-sdma
+              - fsl,imx8mn-sdma
+              - fsl,imx8mm-sdma
+          - const: fsl,imx8mq-sdma
+      - items:
+          - enum:
+              - fsl,imx25-sdma
+              - fsl,imx31-sdma
+              - fsl,imx35-sdma
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  fsl,sdma-ram-script-name:
+    $ref: /schemas/types.yaml#/definitions/string
+    description: Should contain the full path of SDMA RAM scripts firmware.
+
+  "#dma-cells":
+    const: 3
+    description: |
+      The first cell: request/event ID
+
+      The second cell: peripheral types ID
+        enum:
+          - MCU domain SSI: 0
+          - Shared SSI: 1
+          - MMC: 2
+          - SDHC: 3
+          - MCU domain UART: 4
+          - Shared UART: 5
+          - FIRI: 6
+          - MCU domain CSPI: 7
+          - Shared CSPI: 8
+          - SIM: 9
+          - ATA: 10
+          - CCM: 11
+          - External peripheral: 12
+          - Memory Stick Host Controller: 13
+          - Shared Memory Stick Host Controller: 14
+          - DSP: 15
+          - Memory: 16
+          - FIFO type Memory: 17
+          - SPDIF: 18
+          - IPU Memory: 19
+          - ASRC: 20
+          - ESAI: 21
+          - SSI Dual FIFO: 22
+              description: needs firmware more than ver 2
+          - Shared ASRC: 23
+          - SAI: 24
+          - HDMI Audio: 25
+
+       The third cell: transfer priority ID
+         enum:
+           - High: 0
+           - Medium: 1
+           - Low: 2
+
+  gpr:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle to the General Purpose Register (GPR) node
+
+  fsl,sdma-event-remap:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    maxItems: 2
+    items:
+      items:
+        - description: GPR register offset
+        - description: GPR register shift
+        - description: GPR register value
+    description: |
+      Register bits of sdma event remap, the format is <reg shift val>.
+      The order is <RX>, <TX>.
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: ipg
+      - const: ahb
+
+  iram:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle to the On-chip RAM (OCRAM) node.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - fsl,sdma-ram-script-name
+  - "#dma-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    sdma: dma-controller@83fb0000 {
+      compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
+      reg = <0x83fb0000 0x4000>;
+      interrupts = <6>;
+      #dma-cells = <3>;
+      fsl,sdma-ram-script-name = "sdma-imx51.bin";
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
deleted file mode 100644
index 12c316ff4834..000000000000
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ /dev/null
@@ -1,118 +0,0 @@ 
-* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
-
-Required properties:
-- compatible : Should be one of
-      "fsl,imx25-sdma"
-      "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
-      "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
-      "fsl,imx51-sdma"
-      "fsl,imx53-sdma"
-      "fsl,imx6q-sdma"
-      "fsl,imx7d-sdma"
-      "fsl,imx6ul-sdma"
-      "fsl,imx8mq-sdma"
-      "fsl,imx8mm-sdma"
-      "fsl,imx8mn-sdma"
-      "fsl,imx8mp-sdma"
-  The -to variants should be preferred since they allow to determine the
-  correct ROM script addresses needed for the driver to work without additional
-  firmware.
-- reg : Should contain SDMA registers location and length
-- interrupts : Should contain SDMA interrupt
-- #dma-cells : Must be <3>.
-  The first cell specifies the DMA request/event ID.  See details below
-  about the second and third cell.
-- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
-  scripts firmware
-
-The second cell of dma phandle specifies the peripheral type of DMA transfer.
-The full ID of peripheral types can be found below.
-
-	ID	transfer type
-	---------------------
-	0	MCU domain SSI
-	1	Shared SSI
-	2	MMC
-	3	SDHC
-	4	MCU domain UART
-	5	Shared UART
-	6	FIRI
-	7	MCU domain CSPI
-	8	Shared CSPI
-	9	SIM
-	10	ATA
-	11	CCM
-	12	External peripheral
-	13	Memory Stick Host Controller
-	14	Shared Memory Stick Host Controller
-	15	DSP
-	16	Memory
-	17	FIFO type Memory
-	18	SPDIF
-	19	IPU Memory
-	20	ASRC
-	21	ESAI
-	22	SSI Dual FIFO	(needs firmware ver >= 2)
-	23	Shared ASRC
-	24	SAI
-
-The third cell specifies the transfer priority as below.
-
-	ID	transfer priority
-	-------------------------
-	0	High
-	1	Medium
-	2	Low
-
-Optional properties:
-
-- gpr : The phandle to the General Purpose Register (GPR) node.
-- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
-  <reg shift val>.
-    reg is the GPR register offset.
-    shift is the bit position inside the GPR register.
-    val is the value of the bit (0 or 1).
-
-Examples:
-
-sdma@83fb0000 {
-	compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
-	reg = <0x83fb0000 0x4000>;
-	interrupts = <6>;
-	#dma-cells = <3>;
-	fsl,sdma-ram-script-name = "sdma-imx51.bin";
-};
-
-DMA clients connected to the i.MX SDMA controller must use the format
-described in the dma.txt file.
-
-Examples:
-
-ssi2: ssi@70014000 {
-	compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
-	reg = <0x70014000 0x4000>;
-	interrupts = <30>;
-	clocks = <&clks 49>;
-	dmas = <&sdma 24 1 0>,
-	       <&sdma 25 1 0>;
-	dma-names = "rx", "tx";
-	fsl,fifo-depth = <15>;
-};
-
-Using the fsl,sdma-event-remap property:
-
-If we want to use SDMA on the SAI1 port on a MX6SX:
-
-&sdma {
-	gpr = <&gpr>;
-	/* SDMA events remap for SAI1_RX and SAI1_TX */
-	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
-};
-
-The fsl,sdma-event-remap property in this case has two values:
-- <0 15 1> means that the offset is 0, so GPR0 is the register of the
-SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
-Setting bit 15 to 1 selects SAI1_RX.
-- <0 16 1> means that the offset is 0, so GPR0 is the register of the
-SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
-Setting bit 16 to 1 selects SAI1_TX.