Message ID | 20230124192351.695838-2-ahalaney@redhat.com |
---|---|
State | New |
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Tue, 24 Jan 2023 11:24:22 -0800 (PST) X-Received: by 2002:a05:6808:300e:b0:364:f962:afd1 with SMTP id ay14-20020a056808300e00b00364f962afd1mr15578541oib.56.1674588261773; Tue, 24 Jan 2023 11:24:21 -0800 (PST) Received: from halaney-x13s.attlocal.net ([2600:1700:1ff0:d0e0::21]) by smtp.gmail.com with ESMTPSA id r21-20020a056808211500b0036e3bb67a20sm1388024oiw.38.2023.01.24.11.24.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 11:24:21 -0800 (PST) From: Andrew Halaney <ahalaney@redhat.com> To: andersson@kernel.org Cc: agross@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bmasney@redhat.com, quic_shazhuss@quicinc.com, Andrew Halaney <ahalaney@redhat.com> Subject: [PATCH 2/2] arm64: dts: qcom: sa8540p-ride: Document i2c busses Date: Tue, 24 Jan 2023 13:23:51 -0600 Message-Id: <20230124192351.695838-2-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230124192351.695838-1-ahalaney@redhat.com> References: <20230124192351.695838-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755933215228194539?= X-GMAIL-MSGID: =?utf-8?q?1755933215228194539?= |
Series |
[1/2] arm64: dts: qcom: sa8540p-ride: Fix some i2c pinctrl settings
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Commit Message
Andrew Halaney
Jan. 24, 2023, 7:23 p.m. UTC
It isn't obvious in the current devicetree what is connected. Go ahead
and document what's on the other end.
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
---
Not sure if this sort of patch is actually welcomed or not but I went
through this exercise (for the prior patch) and thought it might be
useful to document.
Shazad, this also highlights (unless I misread things) that i2c12 has no
use for us, right? If agreed I can remove it but sorting through the
lore links that provided all this it seems like at the time it was
desired to be added.
Thanks,
Andrew
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++
1 file changed, 5 insertions(+)
Comments
On 24.01.2023 20:23, Andrew Halaney wrote: > It isn't obvious in the current devicetree what is connected. Go ahead > and document what's on the other end. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- Other boards do similar things under the i2c host nodes (see e.g. sm8450-sony-xperia-nagara.dtsi.. > > Not sure if this sort of patch is actually welcomed or not but I went > through this exercise (for the prior patch) and thought it might be > useful to document. ..and yes it is very welcome! > > Shazad, this also highlights (unless I misread things) that i2c12 has no > use for us, right? If agreed I can remove it but sorting through the > lore links that provided all this it seems like at the time it was > desired to be added. It's fine if you guys decide that it's useful for some kind expansion mezzanine or other add-on board, but if it's not connected anywhere you may wish to disable the host and remove the pinctrl entries, as keeping it enabled essentially wastes some power. Konrad > > Thanks, > Andrew > > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index cb9fbdeb5a9e..3478ab91fe73 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -317,6 +317,7 @@ &xo_board_clk { > > &tlmm { > i2c0_default: i2c0-default-state { > + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ > pins = "gpio135", "gpio136"; > function = "qup0"; > drive-strength = <2>; > @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { > }; > > i2c1_default: i2c1-default-state { > + /* To PM40028B-F3EI PCIe switch */ > pins = "gpio158", "gpio159"; > function = "qup1"; > drive-strength = <2>; > @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { > }; > > i2c12_default: i2c12-default-state { > + /* Not connected */ > pins = "gpio0", "gpio1"; > function = "qup12"; > drive-strength = <2>; > @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { > }; > > i2c15_default: i2c15-default-state { > + /* To display connector (SIP1 only) */ > pins = "gpio36", "gpio37"; > function = "qup15"; > drive-strength = <2>; > @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { > }; > > i2c18_default: i2c18-default-state { > + /* To ASM330LHH IMU (SIP1 only) */ > pins = "gpio66", "gpio67"; > function = "qup18"; > drive-strength = <2>;
On 1/25/2023 12:53 AM, Andrew Halaney wrote: > It isn't obvious in the current devicetree what is connected. Go ahead > and document what's on the other end. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- > > Not sure if this sort of patch is actually welcomed or not but I went > through this exercise (for the prior patch) and thought it might be > useful to document. > > Shazad, this also highlights (unless I misread things) that i2c12 has no > use for us, right? If agreed I can remove it but sorting through the > lore links that provided all this it seems like at the time it was > desired to be added. > Andrew, i2c12 has GPU PWR ctl use case, so let's keep it enabled. -Shazad > Thanks, > Andrew > > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index cb9fbdeb5a9e..3478ab91fe73 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -317,6 +317,7 @@ &xo_board_clk { > > &tlmm { > i2c0_default: i2c0-default-state { > + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ > pins = "gpio135", "gpio136"; > function = "qup0"; > drive-strength = <2>; > @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { > }; > > i2c1_default: i2c1-default-state { > + /* To PM40028B-F3EI PCIe switch */ > pins = "gpio158", "gpio159"; > function = "qup1"; > drive-strength = <2>; > @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { > }; > > i2c12_default: i2c12-default-state { > + /* Not connected */ > pins = "gpio0", "gpio1"; > function = "qup12"; > drive-strength = <2>; > @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { > }; > > i2c15_default: i2c15-default-state { > + /* To display connector (SIP1 only) */ > pins = "gpio36", "gpio37"; > function = "qup15"; > drive-strength = <2>; > @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { > }; > > i2c18_default: i2c18-default-state { > + /* To ASM330LHH IMU (SIP1 only) */ > pins = "gpio66", "gpio67"; > function = "qup18"; > drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index cb9fbdeb5a9e..3478ab91fe73 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -317,6 +317,7 @@ &xo_board_clk { &tlmm { i2c0_default: i2c0-default-state { + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins = "gpio135", "gpio136"; function = "qup0"; drive-strength = <2>; @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { }; i2c1_default: i2c1-default-state { + /* To PM40028B-F3EI PCIe switch */ pins = "gpio158", "gpio159"; function = "qup1"; drive-strength = <2>; @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { }; i2c12_default: i2c12-default-state { + /* Not connected */ pins = "gpio0", "gpio1"; function = "qup12"; drive-strength = <2>; @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { }; i2c15_default: i2c15-default-state { + /* To display connector (SIP1 only) */ pins = "gpio36", "gpio37"; function = "qup15"; drive-strength = <2>; @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { }; i2c18_default: i2c18-default-state { + /* To ASM330LHH IMU (SIP1 only) */ pins = "gpio66", "gpio67"; function = "qup18"; drive-strength = <2>;