[2/2] arch: arm64: dts: Add support for AM69 Starter Kit
Commit Message
From: Dasnavis Sabiya <sabiya.d@ti.com>
AM69 Starter Kit is a single board designed for TI AM69 SOC that
provides advanced system integration in automotive ADAS applications,
autonomous mobile robot and edge AI applications. The SOC comprises
of Cortex-A72s in dual clusters, lockstep capable dual Cortex-R5F MCUs,
Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP)
and multiple vision assist accelerators, Depth and Motion Processing
Accelerators (DMPAC), Deep-learning Matrix Multiply Accelerator(MMA)
and C7x floating point vector DSP
AM69 SK supports the following interfaces:
* 32 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x3 USB 3.0 Type-A ports
* x1 USB 3.0 Type-C port
* x1 UHS-1 capable micro-SD card slot
* x4 MCAN instances
* 32 GB eMMC Flash
* 512 Mbit OSPI flash
* x2 Display connectors
* x1 PCIe M.2 M Key
* x1 PCIe M.2 E Key
* x1 4L PCIe Card Slot
* x3 CSI2 Camera interface
* 40-pin Raspberry Pi header
Add initial support for the AM69 SK board.
Design Files: https://www.ti.com/lit/zip/SPRR466
TRM: https://www.ti.com/lit/zip/spruj52
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 1 +
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 180 ++++++++++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk.dts
Comments
Hi Krzysztof,
On 19/01/23 19:06, Krzysztof Kozlowski wrote:
> On 19/01/2023 14:29, sabiya.d@mistralsolutions.com wrote:
>> From: Dasnavis Sabiya <sabiya.d@ti.com>
>>
>> AM69 Starter Kit is a single board designed for TI AM69 SOC that
>> provides advanced system integration in automotive ADAS applications,
>> autonomous mobile robot and edge AI applications. The SOC comprises
>> of Cortex-A72s in dual clusters, lockstep capable dual Cortex-R5F MCUs,
>> Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP)
>> and multiple vision assist accelerators, Depth and Motion Processing
>> Accelerators (DMPAC), Deep-learning Matrix Multiply Accelerator(MMA)
>> and C7x floating point vector DSP
>>
>> AM69 SK supports the following interfaces:
>> * 32 GB LPDDR4 RAM
>> * x1 Gigabit Ethernet interface
>> * x3 USB 3.0 Type-A ports
>> * x1 USB 3.0 Type-C port
>> * x1 UHS-1 capable micro-SD card slot
>> * x4 MCAN instances
>> * 32 GB eMMC Flash
>> * 512 Mbit OSPI flash
>> * x2 Display connectors
>> * x1 PCIe M.2 M Key
>> * x1 PCIe M.2 E Key
>> * x1 4L PCIe Card Slot
>> * x3 CSI2 Camera interface
>> * 40-pin Raspberry Pi header
>>
>> Add initial support for the AM69 SK board.
>
> Thank you for your patch. There is something to discuss/improve.
>
>>
>> Design Files: https://www.ti.com/lit/zip/SPRR466
>> TRM: https://www.ti.com/lit/zip/spruj52
>>
>> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/Makefile | 1 +
>> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 180 ++++++++++++++++++++++++++
>> 2 files changed, 181 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk.dts
>>
>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>> index e7c2c7dd0b25..04b1a7611096 100644
>> --- a/arch/arm64/boot/dts/ti/Makefile
>> +++ b/arch/arm64/boot/dts/ti/Makefile
>> @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
>>
>> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
>>
>> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
>
> I was told the order of entries here is "time of release". Is it
> correct? This is the order you want to keep here and am69-sk was
> released after j721s2-common-proc-board but before j784s4-evm?
Unfortunately, files are not in any particular order at the moment.
Currently, entries are grouped into a block based upon SoC present on
them. Boards within the family block are sorted alphabetically. But the
block of SoCs itself is arranged in no particular order.
I would like to propose to cleanup this file such that board dtbs are
grouped as per SoC present on them (like now), sort the group
alphabetically. Also then sort alphabetically within the family (similar
how boards appear in dt bindings)
Will do that towards end of rc6 once these patches are queued up to
avoid merge conflicts.
>
>> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
>>
>
>
> Best regards,
> Krzysztof
>
Hi Krzysztof,
On Fri, Jan 20, 2023 at 4:03 PM Vignesh Raghavendra <vigneshr@ti.com> wrote:
>
> Hi Krzysztof,
>
> On 19/01/23 19:06, Krzysztof Kozlowski wrote:
> > On 19/01/2023 14:29, sabiya.d@mistralsolutions.com wrote:
> >> From: Dasnavis Sabiya <sabiya.d@ti.com>
> >>
> >> AM69 Starter Kit is a single board designed for TI AM69 SOC that
> >> provides advanced system integration in automotive ADAS applications,
> >> autonomous mobile robot and edge AI applications. The SOC comprises
> >> of Cortex-A72s in dual clusters, lockstep capable dual Cortex-R5F MCUs,
> >> Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP)
> >> and multiple vision assist accelerators, Depth and Motion Processing
> >> Accelerators (DMPAC), Deep-learning Matrix Multiply Accelerator(MMA)
> >> and C7x floating point vector DSP
> >>
> >> AM69 SK supports the following interfaces:
> >> * 32 GB LPDDR4 RAM
> >> * x1 Gigabit Ethernet interface
> >> * x3 USB 3.0 Type-A ports
> >> * x1 USB 3.0 Type-C port
> >> * x1 UHS-1 capable micro-SD card slot
> >> * x4 MCAN instances
> >> * 32 GB eMMC Flash
> >> * 512 Mbit OSPI flash
> >> * x2 Display connectors
> >> * x1 PCIe M.2 M Key
> >> * x1 PCIe M.2 E Key
> >> * x1 4L PCIe Card Slot
> >> * x3 CSI2 Camera interface
> >> * 40-pin Raspberry Pi header
> >>
> >> Add initial support for the AM69 SK board.
> >
> > Thank you for your patch. There is something to discuss/improve.
> >
> >>
> >> Design Files: https://www.ti.com/lit/zip/SPRR466
> >> TRM: https://www.ti.com/lit/zip/spruj52
> >>
> >> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
> >> ---
> >> arch/arm64/boot/dts/ti/Makefile | 1 +
> >> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 180 ++++++++++++++++++++++++++
> >> 2 files changed, 181 insertions(+)
> >> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk.dts
> >>
> >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> >> index e7c2c7dd0b25..04b1a7611096 100644
> >> --- a/arch/arm64/boot/dts/ti/Makefile
> >> +++ b/arch/arm64/boot/dts/ti/Makefile
> >> @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
> >>
> >> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
> >>
> >> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
> >
> > I was told the order of entries here is "time of release". Is it
> > correct? This is the order you want to keep here and am69-sk was
> > released after j721s2-common-proc-board but before j784s4-evm?
>
>
> Unfortunately, files are not in any particular order at the moment.
>
> Currently, entries are grouped into a block based upon SoC present on
> them. Boards within the family block are sorted alphabetically. But the
> block of SoCs itself is arranged in no particular order.
>
> I would like to propose to cleanup this file such that board dtbs are
> grouped as per SoC present on them (like now), sort the group
> alphabetically. Also then sort alphabetically within the family (similar
> how boards appear in dt bindings)
>
> Will do that towards end of rc6 once these patches are queued up to
> avoid merge conflicts.
>
As per the approach mentioned by Vignesh, I have grouped the am69 sk into
the SoC block J784S4 and sorted the board in alphabetical order.
Please revert with your thoughts on this.
> >
> >> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
> >>
> >
> >
> > Best regards,
> > Krzysztof
> >
>
> --
> Regards
> Vignesh
Regards
Dasnavis Sabiya
Hi Krzysztof,
On Mon, Jan 23, 2023 at 12:58 PM Dasnavis Sabiya
<sabiya.d@mistralsolutions.com> wrote:
>
> Hi Krzysztof,
>
> On Fri, Jan 20, 2023 at 4:03 PM Vignesh Raghavendra <vigneshr@ti.com> wrote:
> >
> > Hi Krzysztof,
> >
> > On 19/01/23 19:06, Krzysztof Kozlowski wrote:
> > > On 19/01/2023 14:29, sabiya.d@mistralsolutions.com wrote:
> > >> From: Dasnavis Sabiya <sabiya.d@ti.com>
> > >>
> > >> AM69 Starter Kit is a single board designed for TI AM69 SOC that
> > >> provides advanced system integration in automotive ADAS applications,
> > >> autonomous mobile robot and edge AI applications. The SOC comprises
> > >> of Cortex-A72s in dual clusters, lockstep capable dual Cortex-R5F MCUs,
> > >> Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP)
> > >> and multiple vision assist accelerators, Depth and Motion Processing
> > >> Accelerators (DMPAC), Deep-learning Matrix Multiply Accelerator(MMA)
> > >> and C7x floating point vector DSP
> > >>
> > >> AM69 SK supports the following interfaces:
> > >> * 32 GB LPDDR4 RAM
> > >> * x1 Gigabit Ethernet interface
> > >> * x3 USB 3.0 Type-A ports
> > >> * x1 USB 3.0 Type-C port
> > >> * x1 UHS-1 capable micro-SD card slot
> > >> * x4 MCAN instances
> > >> * 32 GB eMMC Flash
> > >> * 512 Mbit OSPI flash
> > >> * x2 Display connectors
> > >> * x1 PCIe M.2 M Key
> > >> * x1 PCIe M.2 E Key
> > >> * x1 4L PCIe Card Slot
> > >> * x3 CSI2 Camera interface
> > >> * 40-pin Raspberry Pi header
> > >>
> > >> Add initial support for the AM69 SK board.
> > >
> > > Thank you for your patch. There is something to discuss/improve.
> > >
> > >>
> > >> Design Files: https://www.ti.com/lit/zip/SPRR466
> > >> TRM: https://www.ti.com/lit/zip/spruj52
> > >>
> > >> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
> > >> ---
> > >> arch/arm64/boot/dts/ti/Makefile | 1 +
> > >> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 180 ++++++++++++++++++++++++++
> > >> 2 files changed, 181 insertions(+)
> > >> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk.dts
> > >>
> > >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> > >> index e7c2c7dd0b25..04b1a7611096 100644
> > >> --- a/arch/arm64/boot/dts/ti/Makefile
> > >> +++ b/arch/arm64/boot/dts/ti/Makefile
> > >> @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
> > >>
> > >> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
> > >>
> > >> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
> > >
> > > I was told the order of entries here is "time of release". Is it
> > > correct? This is the order you want to keep here and am69-sk was
> > > released after j721s2-common-proc-board but before j784s4-evm?
> >
> >
> > Unfortunately, files are not in any particular order at the moment.
> >
> > Currently, entries are grouped into a block based upon SoC present on
> > them. Boards within the family block are sorted alphabetically. But the
> > block of SoCs itself is arranged in no particular order.
> >
> > I would like to propose to cleanup this file such that board dtbs are
> > grouped as per SoC present on them (like now), sort the group
> > alphabetically. Also then sort alphabetically within the family (similar
> > how boards appear in dt bindings)
> >
> > Will do that towards end of rc6 once these patches are queued up to
> > avoid merge conflicts.
> >
> As per the approach mentioned by Vignesh, I have grouped the am69 sk into
> the SoC block J784S4 and sorted the board in alphabetical order.
> Please revert with your thoughts on this.
> > >
Could you please let me know if the approach is acceptable?
> > >> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
> > >>
> > >
> > >
> > > Best regards,
> > > Krzysztof
> > >
> >
> > --
> > Regards
> > Vignesh
>
> Regards
> Dasnavis Sabiya
Regards,
Dasnavis Sabiya
Hi Sabiya
On 25/01/23 6:44 pm, Dasnavis Sabiya wrote:
> Hi Krzysztof,
>
> On Mon, Jan 23, 2023 at 12:58 PM Dasnavis Sabiya
> <sabiya.d@mistralsolutions.com> wrote:
>> Hi Krzysztof,
>>
>> On Fri, Jan 20, 2023 at 4:03 PM Vignesh Raghavendra <vigneshr@ti.com> wrote:
>>> Hi Krzysztof,
>>>
>>> On 19/01/23 19:06, Krzysztof Kozlowski wrote:
>>>> On 19/01/2023 14:29, sabiya.d@mistralsolutions.com wrote:
>>>>> From: Dasnavis Sabiya <sabiya.d@ti.com>
>>>>>
>>>>> AM69 Starter Kit is a single board designed for TI AM69 SOC that
>>>>> provides advanced system integration in automotive ADAS applications,
>>>>> autonomous mobile robot and edge AI applications. The SOC comprises
>>>>> of Cortex-A72s in dual clusters, lockstep capable dual Cortex-R5F MCUs,
>>>>> Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP)
>>>>> and multiple vision assist accelerators, Depth and Motion Processing
>>>>> Accelerators (DMPAC), Deep-learning Matrix Multiply Accelerator(MMA)
>>>>> and C7x floating point vector DSP
>>>>>
>>>>> AM69 SK supports the following interfaces:
>>>>> * 32 GB LPDDR4 RAM
>>>>> * x1 Gigabit Ethernet interface
>>>>> * x3 USB 3.0 Type-A ports
>>>>> * x1 USB 3.0 Type-C port
>>>>> * x1 UHS-1 capable micro-SD card slot
>>>>> * x4 MCAN instances
>>>>> * 32 GB eMMC Flash
>>>>> * 512 Mbit OSPI flash
>>>>> * x2 Display connectors
>>>>> * x1 PCIe M.2 M Key
>>>>> * x1 PCIe M.2 E Key
>>>>> * x1 4L PCIe Card Slot
>>>>> * x3 CSI2 Camera interface
>>>>> * 40-pin Raspberry Pi header
>>>>>
>>>>> Add initial support for the AM69 SK board.
>>>> Thank you for your patch. There is something to discuss/improve.
>>>>
>>>>> Design Files: https://www.ti.com/lit/zip/SPRR466
>>>>> TRM: https://www.ti.com/lit/zip/spruj52
>>>>>
>>>>> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
>>>>> ---
>>>>> arch/arm64/boot/dts/ti/Makefile | 1 +
>>>>> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 180 ++++++++++++++++++++++++++
>>>>> 2 files changed, 181 insertions(+)
>>>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk.dts
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>>>>> index e7c2c7dd0b25..04b1a7611096 100644
>>>>> --- a/arch/arm64/boot/dts/ti/Makefile
>>>>> +++ b/arch/arm64/boot/dts/ti/Makefile
>>>>> @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
>>>>>
>>>>> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
>>>>>
>>>>> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
>>>> I was told the order of entries here is "time of release". Is it
>>>> correct? This is the order you want to keep here and am69-sk was
>>>> released after j721s2-common-proc-board but before j784s4-evm?
>>>
>>> Unfortunately, files are not in any particular order at the moment.
>>>
>>> Currently, entries are grouped into a block based upon SoC present on
>>> them. Boards within the family block are sorted alphabetically. But the
>>> block of SoCs itself is arranged in no particular order.
>>>
>>> I would like to propose to cleanup this file such that board dtbs are
>>> grouped as per SoC present on them (like now), sort the group
>>> alphabetically. Also then sort alphabetically within the family (similar
>>> how boards appear in dt bindings)
>>>
>>> Will do that towards end of rc6 once these patches are queued up to
>>> avoid merge conflicts.
>>>
>> As per the approach mentioned by Vignesh, I have grouped the am69 sk into
>> the SoC block J784S4 and sorted the board in alphabetical order.
>> Please revert with your thoughts on this.
> Could you please let me know if the approach is acceptable?
I intend to queue this series as is if there are no further comments and
then send a cleanup patch to reorder entries as I described above.
Regards
Vignesh
@@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
new file mode 100644
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Design Files: https://www.ti.com/lit/zip/SPRR466
+ * TRM: https://www.ti.com/lit/zip/spruj52
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-j784s4.dtsi"
+
+/ {
+ compatible = "ti,am69-sk", "ti,j784s4";
+ model = "Texas Instruments AM69 SK";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ aliases {
+ serial2 = &main_uart8;
+ mmc1 = &main_sdhci1;
+ i2c0 = &main_i2c0;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 32G RAM */
+ reg = <0x00 0x80000000 0x00 0x80000000>,
+ <0x08 0x80000000 0x07 0x80000000>;
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>;
+ no-map;
+ };
+ };
+
+ vusb_main: regulator-vusb-main5v0 {
+ /* USB MAIN INPUT 5V DC */
+ compatible = "regulator-fixed";
+ regulator-name = "vusb-main5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_5v0: regulator-vsys5v0 {
+ /* Output of LM61460 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vusb_main>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: regulator-vsys3v3 {
+ /* Output of LM5143 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vusb_main>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_mmc1: regulator-sd {
+ /* Output of TPS22918 */
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_mmc1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vsys_3v3>;
+ gpio = <&exp1 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_sd_dv: regulator-tlv71033 {
+ /* Output of TLV71033 */
+ compatible = "regulator-gpio";
+ regulator-name = "tlv71033";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_dv_pins_default>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ vin-supply = <&vsys_5v0>;
+ gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
+ };
+};
+
+&main_pmx0 {
+ main_uart8_pins_default: main-uart8-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
+ J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
+ >;
+ };
+
+ main_i2c0_pins_default: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
+ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
+ J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
+ J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */
+ J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
+ J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
+ J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
+ J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
+ J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
+ >;
+ };
+
+ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0C4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
+ >;
+ };
+};
+
+&main_uart8 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart8_pins_default>;
+};
+
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ exp1: gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "BOARDID_EEPROM_WP", "CAN_STB", "GPIO_uSD_PWR_EN",
+ "IO_EXP_MCU_RGMII_RST#", "IO_EXP_PCIe0_4L_PERST#",
+ "IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_PCIe3_M.2_RTSz",
+ "PM_INA_BUS_EN", "ENET1_EXP_PWRDN", "EXP1_ENET_RSTz",
+ "ENET1_I2CMUX_SEL", "PCIe0_CLKREQ#", "PCIe1_M.2_CLKREQ#",
+ "PCIe3_M2_CLKREQ#", "PCIe0_PRSNT2#_1", "PCIe0_PRSNT2#_2";
+ };
+};
+
+&main_sdhci1 {
+ /* SD card */
+ status = "okay";
+ pinctrl-0 = <&main_mmc1_pins_default>;
+ pinctrl-names = "default";
+ disable-wp;
+ vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vdd_sd_dv>;
+};
+
+&main_gpio0 {
+ status = "okay";
+};