[v2,7/9] arm64: dts: mediatek: mt8186: Add DPI node

Message ID 20230118091829.755-8-allen-kh.cheng@mediatek.com
State New
Headers
Series Add and update some driver nodes for MT8186 SoC |

Commit Message

Allen-KH Cheng Jan. 18, 2023, 9:18 a.m. UTC
  Add DPI node for MT8186 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
---
 arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
  

Comments

AngeloGioacchino Del Regno Jan. 18, 2023, 12:40 p.m. UTC | #1
Il 18/01/23 10:18, Allen-KH Cheng ha scritto:
> Add DPI node for MT8186 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  
Matthias Brugger Jan. 19, 2023, 4:38 p.m. UTC | #2
On 18/01/2023 10:18, Allen-KH Cheng wrote:
> Add DPI node for MT8186 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>

Applied, thanks!

> ---
>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index c52f9be1e750..45b9d6777929 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -1230,6 +1230,23 @@
>   			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
>   		};
>   
> +		dpi: dpi@1400a000 {
> +			compatible = "mediatek,mt8186-dpi";
> +			reg = <0 0x1400a000 0 0x1000>;
> +			clocks = <&topckgen CLK_TOP_DPI>,
> +				 <&mmsys CLK_MM_DISP_DPI>,
> +				 <&apmixedsys CLK_APMIXED_TVDPLL>;
> +			clock-names = "pixel", "engine", "pll";
> +			assigned-clocks = <&topckgen CLK_TOP_DPI>;
> +			assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
> +			interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
> +			status = "disabled";
> +
> +			port {
> +				dpi_out: endpoint { };
> +			};
> +		};
> +
>   		dsi0: dsi@14013000 {
>   			compatible = "mediatek,mt8186-dsi";
>   			reg = <0 0x14013000 0 0x1000>;
  

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..45b9d6777929 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@ 
 			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
 		};
 
+		dpi: dpi@1400a000 {
+			compatible = "mediatek,mt8186-dpi";
+			reg = <0 0x1400a000 0 0x1000>;
+			clocks = <&topckgen CLK_TOP_DPI>,
+				 <&mmsys CLK_MM_DISP_DPI>,
+				 <&apmixedsys CLK_APMIXED_TVDPLL>;
+			clock-names = "pixel", "engine", "pll";
+			assigned-clocks = <&topckgen CLK_TOP_DPI>;
+			assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+			interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
+			status = "disabled";
+
+			port {
+				dpi_out: endpoint { };
+			};
+		};
+
 		dsi0: dsi@14013000 {
 			compatible = "mediatek,mt8186-dsi";
 			reg = <0 0x14013000 0 0x1000>;