Message ID | 20230112135117.3836655-1-quic_bjorande@quicinc.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b16-20020a630c10000000b004b2317cd02fsi13060497pgl.582.2023.01.12.06.04.26; Thu, 12 Jan 2023 06:04:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=Nzl4ZOXU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232994AbjALNvj (ORCPT <rfc822;zhuangel570@gmail.com> + 99 others); Thu, 12 Jan 2023 08:51:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232597AbjALNv2 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 12 Jan 2023 08:51:28 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A74D14FD4E; Thu, 12 Jan 2023 05:51:26 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30CDS7Jo025737; Thu, 12 Jan 2023 13:51:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=kcMTzljDeT/7YLmtLRXP5hfDVv6Ofl8ame0LMxCO+sg=; b=Nzl4ZOXUCfUnxhDoV6FaQvJdBJW5pMOhzCHXE+aPpgTk8NaOmGuJcG8NGBicnlEgyiAf wbtgyC0Rj6eBrHIJNySFH8HhN05Ogns22eDkB8aTsDBYinBozl6T9MSvsYDUZVQumgbD 8RcQyx/WP8REqzdcwu4lPkcHWRokb3WM/ytw8Oax/PDkToqg8UiPMwPqldnogIZCn/3E V9K06TTQ3sO5yWiGU4NaA3zfAv2T6qFibyhjmGKBgtxIJrZfyl04gJtJYRGf3Op0yAMk sVQ5mu+OMftcyhnUw3uQ7+xRSJKD9nG6FJ4oEvwRk/fjIqmPqW03E7x1d3fyefAoVLw0 BA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3n2k47g1wf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 12 Jan 2023 13:51:23 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30CDpNod032487 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 12 Jan 2023 13:51:23 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 12 Jan 2023 05:51:22 -0800 From: Bjorn Andersson <quic_bjorande@quicinc.com> To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Johan Hovold <johan+linaro@kernel.org> Subject: [PATCH] arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers Date: Thu, 12 Jan 2023 05:51:17 -0800 Message-ID: <20230112135117.3836655-1-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: FmbTFr9fyrophvdogZyMBSxpU07RYgsu X-Proofpoint-ORIG-GUID: FmbTFr9fyrophvdogZyMBSxpU07RYgsu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-12_08,2023-01-12_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 clxscore=1011 mlxscore=0 bulkscore=0 adultscore=0 mlxlogscore=910 impostorscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301120100 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754825783535720939?= X-GMAIL-MSGID: =?utf-8?q?1754825783535720939?= |
Series |
arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers
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Commit Message
Bjorn Andersson
Jan. 12, 2023, 1:51 p.m. UTC
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level,
not doing so results in occasional lockups. This was previously hidden
by the fact that the display stack incorrectly voted for CX (instead of
MMCX).
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++
1 file changed, 2 insertions(+)
Comments
On 12.01.2023 14:51, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 Maybe in the future there could be some power savings for lower freqs.. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 2ed17baf50d3..4f4353f84cba 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_PRIM_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_SEC_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_SEC_BCR>; >
On Thu, Jan 12, 2023 at 05:51:17AM -0800, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 2ed17baf50d3..4f4353f84cba 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_PRIM_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_SEC_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_SEC_BCR>; Looks good. Perhaps you can send a binding patch adding 'required-oops' as well. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Johan
On Thu, 12 Jan 2023 05:51:17 -0800, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Applied, thanks! [1/1] arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers commit: fe07640280cd29ac2997a617a1fb5487feef9387 Best regards,
12 января 2023 г. 16:21:14 GMT+02:00, Konrad Dybcio <konrad.dybcio@linaro.org> пишет: > > >On 12.01.2023 14:51, Bjorn Andersson wrote: >> Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, >> not doing so results in occasional lockups. This was previously hidden >> by the fact that the display stack incorrectly voted for CX (instead of >> MMCX). >> >> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") >> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> >> ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 > >Maybe in the future there could be some power savings for lower freqs.. I had the same question. If the vote is not static, but depends on the freq, shouldn't this be to implemented as an opp + table? > >Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > >Konrad >> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> index 2ed17baf50d3..4f4353f84cba 100644 >> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { >> "ss_phy_irq"; >> >> power-domains = <&gcc USB30_PRIM_GDSC>; >> + required-opps = <&rpmhpd_opp_nom>; >> >> resets = <&gcc GCC_USB30_PRIM_BCR>; >> >> @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { >> "ss_phy_irq"; >> >> power-domains = <&gcc USB30_SEC_GDSC>; >> + required-opps = <&rpmhpd_opp_nom>; >> >> resets = <&gcc GCC_USB30_SEC_BCR>; >>
On Thu, Jan 12, 2023 at 07:00:29PM +0200, Dmitry Baryshkov wrote: > 12 января 2023 г. 16:21:14 GMT+02:00, Konrad Dybcio <konrad.dybcio@linaro.org> пишет: > > > > > >On 12.01.2023 14:51, Bjorn Andersson wrote: > >> Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > >> not doing so results in occasional lockups. This was previously hidden > >> by the fact that the display stack incorrectly voted for CX (instead of > >> MMCX). > >> > >> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > >> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > >> ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 > > > >Maybe in the future there could be some power savings for lower freqs.. > > I had the same question. If the vote is not static, but depends on the > freq, shouldn't this be to implemented as an opp + table? > The upstream Linux driver does not dynamically adjust the rate of the core clock, so whenever the device isn't suspended it will tick at 200MHz and require nominal voltage. The downstream driver does adjust the core clock rate based on the link, and can thereby adjust the voltage level as well. So once this is supported upstream, replacing this with an opp-table would be appropriate. Regards, Bjorn > > > > >Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > > >Konrad > >> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> index 2ed17baf50d3..4f4353f84cba 100644 > >> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > >> "ss_phy_irq"; > >> > >> power-domains = <&gcc USB30_PRIM_GDSC>; > >> + required-opps = <&rpmhpd_opp_nom>; > >> > >> resets = <&gcc GCC_USB30_PRIM_BCR>; > >> > >> @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > >> "ss_phy_irq"; > >> > >> power-domains = <&gcc USB30_SEC_GDSC>; > >> + required-opps = <&rpmhpd_opp_nom>; > >> > >> resets = <&gcc GCC_USB30_SEC_BCR>; > >> >
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 2ed17baf50d3..4f4353f84cba 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { "ss_phy_irq"; power-domains = <&gcc USB30_PRIM_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_USB30_PRIM_BCR>; @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { "ss_phy_irq"; power-domains = <&gcc USB30_SEC_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_USB30_SEC_BCR>;