diff mbox series

[04/13] x86/x2apic: Support x2apic self IPI with NMI_VECTOR

Message ID 20221014200913.14644-5-ashok.raj@intel.com
State New
Headers
Series Make microcode loading more robust |

Commit Message

Ashok Raj Oct. 14, 2022, 8:09 p.m. UTC 
  From: Jacob Pan <jacob.jun.pan@linux.intel.com>

X2APIC architecture introduced a dedicated register for sending self-IPI.
Though highly optimized for performance, its semantics limit the delivery
mode to fixed mode.  NMI vector is not supported, this created an
inconsistent behavior between X2APIC and others.

This patch adds support for X2APIC NMI_VECTOR by fall back to the slower
ICR method.

Suggested-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
 arch/x86/kernel/apic/x2apic_phys.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Ashok Raj Oct. 19, 2022, 3:36 p.m. UTC | #1 
On Fri, Oct 14, 2022 at 01:09:04PM -0700, Ashok Raj wrote:
> From: Jacob Pan <jacob.jun.pan@linux.intel.com>
> 
> X2APIC architecture introduced a dedicated register for sending self-IPI.
> Though highly optimized for performance, its semantics limit the delivery
> mode to fixed mode.  NMI vector is not supported, this created an
> inconsistent behavior between X2APIC and others.
> 
> This patch adds support for X2APIC NMI_VECTOR by fall back to the slower
> ICR method.
> 
> Suggested-by: Ashok Raj <ashok.raj@intel.com>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>

Forgot to add my sob here.. I;ll fix it in the resend.
> ---
>  arch/x86/kernel/apic/x2apic_phys.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
> index 6bde05a86b4e..5f533b76adf6 100644
> --- a/arch/x86/kernel/apic/x2apic_phys.c
> +++ b/arch/x86/kernel/apic/x2apic_phys.c
> @@ -149,7 +149,11 @@ int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
>  
>  void x2apic_send_IPI_self(int vector)
>  {
> -	apic_write(APIC_SELF_IPI, vector);
> +	if (vector == NMI_VECTOR)
> +		apic->send_IPI_mask(cpumask_of(smp_processor_id()),
> +				    NMI_VECTOR);
> +	else
> +		apic_write(APIC_SELF_IPI, vector);
>  }

Wanted to send this early if people are planning to test

Similar helper is required for legacy xapic as well. The lack of it helped
test the timeout path's :-).. I'll integrated it when i send the next round
with feedback once i have enough. I'll also send this in the next update.

diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
index 2a6509e8c840..e967c49609ef 100644
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -239,7 +239,11 @@ void default_send_IPI_all(int vector)

 void default_send_IPI_self(int vector)
 {
-       __default_send_IPI_shortcut(APIC_DEST_SELF, vector);
+       if (unlikely(vector == NMI_VECTOR))
+               apic->send_IPI_mask(cpumask_of(smp_processor_id()),
+                                   NMI_VECTOR);
+       else
+               __default_send_IPI_shortcut(APIC_DEST_SELF, vector);
 }

 #ifdef CONFIG_X86_32



>  
>  static struct apic apic_x2apic_phys __ro_after_init = {
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 6bde05a86b4e..5f533b76adf6 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -149,7 +149,11 @@  int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
 
 void x2apic_send_IPI_self(int vector)
 {
-	apic_write(APIC_SELF_IPI, vector);
+	if (vector == NMI_VECTOR)
+		apic->send_IPI_mask(cpumask_of(smp_processor_id()),
+				    NMI_VECTOR);
+	else
+		apic_write(APIC_SELF_IPI, vector);
 }
 
 static struct apic apic_x2apic_phys __ro_after_init = {