[v9,1/4] Documentation: fpga: dfl: Add documentation for DFHv1
Commit Message
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Add documentation describing the extensions provided by Version
1 of the Device Feature Header (DFHv1).
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
v9: move DFH definitions to after the Overview
fix name of feature revision field
clarify next field in DFH
v8: fix section titles
v7: shorten long lines and wording suggestions by bagasdotme@gmail.com
v6: no change
v5: use nested list for field descriptions
clean up prose
add reviewed-by and comments from Ilpo Järvinen
v4: Remove marketing speak and separate v0 and v1 descriptions.
Fix errors reported by "make htmldocs".
v3: no change
v2: s/GUILD/GUID/
add picture
---
Documentation/fpga/dfl.rst | 117 +++++++++++++++++++++++++++++++++++++
1 file changed, 117 insertions(+)
Comments
On 1/4/23 3:22 PM, matthew.gerlach@linux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> Add documentation describing the extensions provided by Version
> 1 of the Device Feature Header (DFHv1).
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Thanks for the changes.
Reviewed-by: Tom Rix <trix@redhat.com>
> ---
> v9: move DFH definitions to after the Overview
> fix name of feature revision field
> clarify next field in DFH
>
> v8: fix section titles
>
> v7: shorten long lines and wording suggestions by bagasdotme@gmail.com
>
> v6: no change
>
> v5: use nested list for field descriptions
> clean up prose
> add reviewed-by and comments from Ilpo Järvinen
>
> v4: Remove marketing speak and separate v0 and v1 descriptions.
> Fix errors reported by "make htmldocs".
>
> v3: no change
>
> v2: s/GUILD/GUID/
> add picture
> ---
> Documentation/fpga/dfl.rst | 117 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 117 insertions(+)
>
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..7e015249785b 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -75,6 +75,123 @@ convenient for software to locate each feature by walking through this list,
> and can be implemented in register regions of any FPGA device.
>
>
> +Device Feature Header - Version 0
> +=================================
> +Version 0 (DFHv0) is the original version of the Device Feature Header.
> +The format of DFHv0 is shown below::
> +
> + +-----------------------------------------------------------------------+
> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00
> + +-----------------------------------------------------------------------+
> + |63 GUID_L 0| 0x08
> + +-----------------------------------------------------------------------+
> + |63 GUID_H 0| 0x10
> + +-----------------------------------------------------------------------+
> +
> +- Offset 0x00
> +
> + * Type - The type of DFH (e.g. FME, AFU, or private feature).
> + * DFH VER - The version of the DFH.
> + * Rsvd - Currently unused.
> + * EOL - Set if the DFH is the end of the Device Feature List (DFL).
> + * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
> + and the start of a DFH must be aligned to an 8 byte boundary.
> + If EOL is set, Next is the size of MMIO of the last feature in the list.
> + * REV - The revision of the feature associated with this header.
> + * ID - The feature ID if Type is private feature.
> +
> +- Offset 0x08
> +
> + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier
> + (present only if Type is FME or AFU).
> +
> +- Offset 0x10
> +
> + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier
> + (present only if Type is FME or AFU).
> +
> +
> +Device Feature Header - Version 1
> +=================================
> +Version 1 (DFHv1) of the Device Feature Header adds the following functionality:
> +
> +* Provides a standardized mechanism for features to describe
> + parameters/capabilities to software.
> +* Standardize the use of a GUID for all DFHv1 types.
> +* Decouples the DFH location from the register space of the feature itself.
> +
> +The format of Version 1 of the Device Feature Header (DFH) is shown below::
> +
> + +-----------------------------------------------------------------------+
> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00
> + +-----------------------------------------------------------------------+
> + |63 GUID_L 0| 0x08
> + +-----------------------------------------------------------------------+
> + |63 GUID_H 0| 0x10
> + +-----------------------------------------------------------------------+
> + |63 Reg Address/Offset 1| Rel 0| 0x18
> + +-----------------------------------------------------------------------+
> + |63 Reg Size 32|Params 31|30 Group 16|15 Instance 0| 0x20
> + +-----------------------------------------------------------------------+
> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| 0x28
> + +-----------------------------------------------------------------------+
> + |63 Parameter Data 0| 0x30
> + +-----------------------------------------------------------------------+
> +
> + ...
> +
> + +-----------------------------------------------------------------------+
> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0|
> + +-----------------------------------------------------------------------+
> + |63 Parameter Data 0|
> + +-----------------------------------------------------------------------+
> +
> +- Offset 0x00
> +
> + * Type - The type of DFH (e.g. FME, AFU, or private feature).
> + * DFH VER - The version of the DFH.
> + * Rsvd - Currently unused.
> + * EOL - Set if the DFH is the end of the Device Feature List (DFL).
> + * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
> + and the start of a DFH must be aligned to an 8 byte boundary.
> + If EOL is set, Next is the size of MMIO of the last feature in the list.
> + * REV - The revision of the feature associated with this header.
> + * ID - The feature ID if Type is private feature.
> +
> +- Offset 0x08
> +
> + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier.
> +
> +- Offset 0x10
> +
> + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier.
> +
> +- Offset 0x18
> +
> + * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits
> + of a 16-bit aligned absolute address of the feature's registers. Otherwise
> + the value is the offset from the start of the DFH of the feature's registers.
> +
> +- Offset 0x20
> +
> + * Reg Size - Size of feature's register set in bytes.
> + * Params - Set if DFH has a list of parameter blocks.
> + * Group - Id of group if feature is part of a group.
> + * Instance - Id of feature instance within a group.
> +
> +- Offset 0x28 if feature has parameters
> +
> + * Next - Offset to the next parameter block in 8 byte words. If EOP set,
> + size in 8 byte words of last parameter.
> + * Param Version - Version of Param ID.
> + * Param ID - ID of parameter.
> +
> +- Offset 0x30
> +
> + * Parameter Data - Parameter data whose size and format is defined by
> + version and ID of the parameter.
> +
> +
> FIU - FME (FPGA Management Engine)
> ==================================
> The FPGA Management Engine performs reconfiguration and other infrastructure
On Mon, 9 Jan 2023, Tom Rix wrote:
>
> On 1/4/23 3:22 PM, matthew.gerlach@linux.intel.com wrote:
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Add documentation describing the extensions provided by Version
>> 1 of the Device Feature Header (DFHv1).
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>
> Thanks for the changes.
>
> Reviewed-by: Tom Rix <trix@redhat.com>
Thanks for the review,
Matthew Gerlach
>
>> ---
>> v9: move DFH definitions to after the Overview
>> fix name of feature revision field
>> clarify next field in DFH
>>
>> v8: fix section titles
>>
>> v7: shorten long lines and wording suggestions by bagasdotme@gmail.com
>>
>> v6: no change
>>
>> v5: use nested list for field descriptions
>> clean up prose
>> add reviewed-by and comments from Ilpo Järvinen
>>
>> v4: Remove marketing speak and separate v0 and v1 descriptions.
>> Fix errors reported by "make htmldocs".
>>
>> v3: no change
>>
>> v2: s/GUILD/GUID/
>> add picture
>> ---
>> Documentation/fpga/dfl.rst | 117 +++++++++++++++++++++++++++++++++++++
>> 1 file changed, 117 insertions(+)
>>
>> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
>> index 15b670926084..7e015249785b 100644
>> --- a/Documentation/fpga/dfl.rst
>> +++ b/Documentation/fpga/dfl.rst
>> @@ -75,6 +75,123 @@ convenient for software to locate each feature by
>> walking through this list,
>> and can be implemented in register regions of any FPGA device.
>> +Device Feature Header - Version 0
>> +=================================
>> +Version 0 (DFHv0) is the original version of the Device Feature Header.
>> +The format of DFHv0 is shown below::
>> +
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID
>> 0| 0x00
>> +
>> +-----------------------------------------------------------------------+
>> + |63 GUID_L
>> 0| 0x08
>> +
>> +-----------------------------------------------------------------------+
>> + |63 GUID_H
>> 0| 0x10
>> +
>> +-----------------------------------------------------------------------+
>> +
>> +- Offset 0x00
>> +
>> + * Type - The type of DFH (e.g. FME, AFU, or private feature).
>> + * DFH VER - The version of the DFH.
>> + * Rsvd - Currently unused.
>> + * EOL - Set if the DFH is the end of the Device Feature List (DFL).
>> + * Next - The offset in bytes of the next DFH in the DFL from the DFH
>> start,
>> + and the start of a DFH must be aligned to an 8 byte boundary.
>> + If EOL is set, Next is the size of MMIO of the last feature in the
>> list.
>> + * REV - The revision of the feature associated with this header.
>> + * ID - The feature ID if Type is private feature.
>> +
>> +- Offset 0x08
>> +
>> + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique
>> Identifier
>> + (present only if Type is FME or AFU).
>> +
>> +- Offset 0x10
>> +
>> + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique
>> Identifier
>> + (present only if Type is FME or AFU).
>> +
>> +
>> +Device Feature Header - Version 1
>> +=================================
>> +Version 1 (DFHv1) of the Device Feature Header adds the following
>> functionality:
>> +
>> +* Provides a standardized mechanism for features to describe
>> + parameters/capabilities to software.
>> +* Standardize the use of a GUID for all DFHv1 types.
>> +* Decouples the DFH location from the register space of the feature
>> itself.
>> +
>> +The format of Version 1 of the Device Feature Header (DFH) is shown
>> below::
>> +
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID
>> 0| 0x00
>> +
>> +-----------------------------------------------------------------------+
>> + |63 GUID_L
>> 0| 0x08
>> +
>> +-----------------------------------------------------------------------+
>> + |63 GUID_H
>> 0| 0x10
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Reg Address/Offset 1| Rel
>> 0| 0x18
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Reg Size 32|Params 31|30 Group 16|15 Instance
>> 0| 0x20
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID
>> 0| 0x28
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Parameter Data
>> 0| 0x30
>> +
>> +-----------------------------------------------------------------------+
>> +
>> + ...
>> +
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID
>> 0|
>> +
>> +-----------------------------------------------------------------------+
>> + |63 Parameter Data
>> 0|
>> +
>> +-----------------------------------------------------------------------+
>> +
>> +- Offset 0x00
>> +
>> + * Type - The type of DFH (e.g. FME, AFU, or private feature).
>> + * DFH VER - The version of the DFH.
>> + * Rsvd - Currently unused.
>> + * EOL - Set if the DFH is the end of the Device Feature List (DFL).
>> + * Next - The offset in bytes of the next DFH in the DFL from the DFH
>> start,
>> + and the start of a DFH must be aligned to an 8 byte boundary.
>> + If EOL is set, Next is the size of MMIO of the last feature in the
>> list.
>> + * REV - The revision of the feature associated with this header.
>> + * ID - The feature ID if Type is private feature.
>> +
>> +- Offset 0x08
>> +
>> + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique
>> Identifier.
>> +
>> +- Offset 0x10
>> +
>> + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique
>> Identifier.
>> +
>> +- Offset 0x18
>> +
>> + * Reg Address/Offset - If Rel bit is set, then the value is the high 63
>> bits
>> + of a 16-bit aligned absolute address of the feature's registers.
>> Otherwise
>> + the value is the offset from the start of the DFH of the feature's
>> registers.
>> +
>> +- Offset 0x20
>> +
>> + * Reg Size - Size of feature's register set in bytes.
>> + * Params - Set if DFH has a list of parameter blocks.
>> + * Group - Id of group if feature is part of a group.
>> + * Instance - Id of feature instance within a group.
>> +
>> +- Offset 0x28 if feature has parameters
>> +
>> + * Next - Offset to the next parameter block in 8 byte words. If EOP set,
>> + size in 8 byte words of last parameter.
>> + * Param Version - Version of Param ID.
>> + * Param ID - ID of parameter.
>> +
>> +- Offset 0x30
>> +
>> + * Parameter Data - Parameter data whose size and format is defined by
>> + version and ID of the parameter.
>> +
>> +
>> FIU - FME (FPGA Management Engine)
>> ==================================
>> The FPGA Management Engine performs reconfiguration and other
>> infrastructure
>
>
@@ -75,6 +75,123 @@ convenient for software to locate each feature by walking through this list,
and can be implemented in register regions of any FPGA device.
+Device Feature Header - Version 0
+=================================
+Version 0 (DFHv0) is the original version of the Device Feature Header.
+The format of DFHv0 is shown below::
+
+ +-----------------------------------------------------------------------+
+ |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00
+ +-----------------------------------------------------------------------+
+ |63 GUID_L 0| 0x08
+ +-----------------------------------------------------------------------+
+ |63 GUID_H 0| 0x10
+ +-----------------------------------------------------------------------+
+
+- Offset 0x00
+
+ * Type - The type of DFH (e.g. FME, AFU, or private feature).
+ * DFH VER - The version of the DFH.
+ * Rsvd - Currently unused.
+ * EOL - Set if the DFH is the end of the Device Feature List (DFL).
+ * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
+ and the start of a DFH must be aligned to an 8 byte boundary.
+ If EOL is set, Next is the size of MMIO of the last feature in the list.
+ * REV - The revision of the feature associated with this header.
+ * ID - The feature ID if Type is private feature.
+
+- Offset 0x08
+
+ * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier
+ (present only if Type is FME or AFU).
+
+- Offset 0x10
+
+ * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier
+ (present only if Type is FME or AFU).
+
+
+Device Feature Header - Version 1
+=================================
+Version 1 (DFHv1) of the Device Feature Header adds the following functionality:
+
+* Provides a standardized mechanism for features to describe
+ parameters/capabilities to software.
+* Standardize the use of a GUID for all DFHv1 types.
+* Decouples the DFH location from the register space of the feature itself.
+
+The format of Version 1 of the Device Feature Header (DFH) is shown below::
+
+ +-----------------------------------------------------------------------+
+ |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00
+ +-----------------------------------------------------------------------+
+ |63 GUID_L 0| 0x08
+ +-----------------------------------------------------------------------+
+ |63 GUID_H 0| 0x10
+ +-----------------------------------------------------------------------+
+ |63 Reg Address/Offset 1| Rel 0| 0x18
+ +-----------------------------------------------------------------------+
+ |63 Reg Size 32|Params 31|30 Group 16|15 Instance 0| 0x20
+ +-----------------------------------------------------------------------+
+ |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| 0x28
+ +-----------------------------------------------------------------------+
+ |63 Parameter Data 0| 0x30
+ +-----------------------------------------------------------------------+
+
+ ...
+
+ +-----------------------------------------------------------------------+
+ |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0|
+ +-----------------------------------------------------------------------+
+ |63 Parameter Data 0|
+ +-----------------------------------------------------------------------+
+
+- Offset 0x00
+
+ * Type - The type of DFH (e.g. FME, AFU, or private feature).
+ * DFH VER - The version of the DFH.
+ * Rsvd - Currently unused.
+ * EOL - Set if the DFH is the end of the Device Feature List (DFL).
+ * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
+ and the start of a DFH must be aligned to an 8 byte boundary.
+ If EOL is set, Next is the size of MMIO of the last feature in the list.
+ * REV - The revision of the feature associated with this header.
+ * ID - The feature ID if Type is private feature.
+
+- Offset 0x08
+
+ * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier.
+
+- Offset 0x10
+
+ * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier.
+
+- Offset 0x18
+
+ * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits
+ of a 16-bit aligned absolute address of the feature's registers. Otherwise
+ the value is the offset from the start of the DFH of the feature's registers.
+
+- Offset 0x20
+
+ * Reg Size - Size of feature's register set in bytes.
+ * Params - Set if DFH has a list of parameter blocks.
+ * Group - Id of group if feature is part of a group.
+ * Instance - Id of feature instance within a group.
+
+- Offset 0x28 if feature has parameters
+
+ * Next - Offset to the next parameter block in 8 byte words. If EOP set,
+ size in 8 byte words of last parameter.
+ * Param Version - Version of Param ID.
+ * Param ID - ID of parameter.
+
+- Offset 0x30
+
+ * Parameter Data - Parameter data whose size and format is defined by
+ version and ID of the parameter.
+
+
FIU - FME (FPGA Management Engine)
==================================
The FPGA Management Engine performs reconfiguration and other infrastructure