diff mbox series

[2/2] drm/panel: boe-tv101wum-nl6: Reduce lcm_reset to send initial code time

Message ID 1672974321-18947-3-git-send-email-xinlei.lee@mediatek.com
State New
Headers
Series Reduce lcm_reset to DSI LP11 send cmd time |

Commit Message

Xinlei Lee (李昕磊) Jan. 6, 2023, 3:05 a.m. UTC 
  From: Xinlei Lee <xinlei.lee@mediatek.com>

Since the panel spec stipulates that the time from lcm_reset to DSI to
send the initial code should be greater than 6ms and less than 40ms,
so reduce the delay before sending the initial code and avoid panel
exceptions.

Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga dsi video mode panel")
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Sam Ravnborg Jan. 7, 2023, 8:31 p.m. UTC | #1 
On Fri, Jan 06, 2023 at 11:05:21AM +0800, xinlei.lee@mediatek.com wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
> 
> Since the panel spec stipulates that the time from lcm_reset to DSI to
> send the initial code should be greater than 6ms and less than 40ms,
> so reduce the delay before sending the initial code and avoid panel
> exceptions.

The changelog says "reduce the delay", but the patch removes the delay.
Are there other delays that make sure the "greater than 6 ms" is OK?

	Sam

> 
> Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga dsi video mode panel")
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
>  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index 857a2f0420d7..f0093035f1ff 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -780,7 +780,6 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
>  };
>  
>  static const struct panel_init_cmd boe_init_cmd[] = {
> -	_INIT_DELAY_CMD(24),
>  	_INIT_DCS_CMD(0xB0, 0x05),
>  	_INIT_DCS_CMD(0xB1, 0xE5),
>  	_INIT_DCS_CMD(0xB3, 0x52),
> -- 
> 2.18.0
AngeloGioacchino Del Regno Jan. 9, 2023, 11:25 a.m. UTC | #2 
Il 06/01/23 04:05, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
> 
> Since the panel spec stipulates that the time from lcm_reset to DSI to
> send the initial code should be greater than 6ms and less than 40ms,
> so reduce the delay before sending the initial code and avoid panel
> exceptions.
> 
> Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga dsi video mode panel")
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
>   drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index 857a2f0420d7..f0093035f1ff 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -780,7 +780,6 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
>   };
>   
>   static const struct panel_init_cmd boe_init_cmd[] = {
> -	_INIT_DELAY_CMD(24),

You said that should be greater than 6 and less than 40: perhaps on MediaTek
platforms removing this delay is fine but we don't know about others - and this
driver is for all platforms.

To stay on the safe side you should, at this point, replace this delay with

	_INIT_DELAY_CMD(7);

Regards,
Angelo
Xinlei Lee (李昕磊) Jan. 9, 2023, 11:54 a.m. UTC | #3 
On Mon, 2023-01-09 at 12:25 +0100, AngeloGioacchino Del Regno wrote:
> Il 06/01/23 04:05, xinlei.lee@mediatek.com ha scritto:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > 
> > Since the panel spec stipulates that the time from lcm_reset to DSI
> > to
> > send the initial code should be greater than 6ms and less than
> > 40ms,
> > so reduce the delay before sending the initial code and avoid panel
> > exceptions.
> > 
> > Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga
> > dsi video mode panel")
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > ---
> >   drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
> >   1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > index 857a2f0420d7..f0093035f1ff 100644
> > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > @@ -780,7 +780,6 @@ static const struct panel_init_cmd
> > inx_hj110iz_init_cmd[] = {
> >   };
> >   
> >   static const struct panel_init_cmd boe_init_cmd[] = {
> > -	_INIT_DELAY_CMD(24),
> 
> You said that should be greater than 6 and less than 40: perhaps on
> MediaTek
> platforms removing this delay is fine but we don't know about others
> - and this
> driver is for all platforms.
> 
> To stay on the safe side you should, at this point, replace this
> delay with
> 
> 	_INIT_DELAY_CMD(7);
> 
> Regards,
> Angelo
> 

Hi Angelo:

Thanks for your reply!

Please allow me to explain, in another dsi modification of this 
series, I reduced the delay of dsi's LP00->LP11 stage from 20ms to 1ms 
(to comply with dsi spec), in fact, in this file, the
boe_panel_prepare function The 6ms delay after pulling up lcm_reset
is before the 1ms mentioned just now, which ensures that the delay is 
within the specified range (7ms).

Do you still have doubts about my explanation?

Best Regards!
xinlei
Xinlei Lee (李昕磊) Jan. 9, 2023, 11:58 a.m. UTC | #4 
On Sat, 2023-01-07 at 21:31 +0100, Sam Ravnborg wrote:
> On Fri, Jan 06, 2023 at 11:05:21AM +0800, xinlei.lee@mediatek.com
> wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > 
> > Since the panel spec stipulates that the time from lcm_reset to DSI
> > to
> > send the initial code should be greater than 6ms and less than
> > 40ms,
> > so reduce the delay before sending the initial code and avoid panel
> > exceptions.
> 
> The changelog says "reduce the delay", but the patch removes the
> delay.
> Are there other delays that make sure the "greater than 6 ms" is OK?
> 
> 	Sam
> 
> > 
> > Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga
> > dsi video mode panel")
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > index 857a2f0420d7..f0093035f1ff 100644
> > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > @@ -780,7 +780,6 @@ static const struct panel_init_cmd
> > inx_hj110iz_init_cmd[] = {
> >  };
> >  
> >  static const struct panel_init_cmd boe_init_cmd[] = {
> > -	_INIT_DELAY_CMD(24),
> >  	_INIT_DCS_CMD(0xB0, 0x05),
> >  	_INIT_DCS_CMD(0xB1, 0xE5),
> >  	_INIT_DCS_CMD(0xB3, 0x52),
> > -- 
> > 2.18.0

Hi Sam:

Thanks for your reply!

Please allow me to explain, in the boe_panel_prepare function in this 
file, there will be a 6ms delay after the reset pin is pulled high 
(gpiod_set_value(boe->enable_gpio, 1)), and the initial code will be 
sent in the boe_panel_init_dcs_cmd function later, This period of time 
ensures that the delay is within the specified range.

In addition, I will add a special panel control in the V2 version, if 
you have any questions, we will discuss it later.

Best Regards!
xinlei
Xinlei Lee (李昕磊) Jan. 12, 2023, 7:26 a.m. UTC | #5 
On Sat, 2023-01-07 at 21:31 +0100, Sam Ravnborg wrote:
> On Fri, Jan 06, 2023 at 11:05:21AM +0800, xinlei.lee@mediatek.com
> wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > 
> > Since the panel spec stipulates that the time from lcm_reset to DSI
> > to
> > send the initial code should be greater than 6ms and less than
> > 40ms,
> > so reduce the delay before sending the initial code and avoid panel
> > exceptions.
> 
> The changelog says "reduce the delay", but the patch removes the
> delay.
> Are there other delays that make sure the "greater than 6 ms" is OK?
> 
> 	Sam
> 
> > 
> > Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga
> > dsi video mode panel")
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > index 857a2f0420d7..f0093035f1ff 100644
> > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > @@ -780,7 +780,6 @@ static const struct panel_init_cmd
> > inx_hj110iz_init_cmd[] = {
> >  };
> >  
> >  static const struct panel_init_cmd boe_init_cmd[] = {
> > -	_INIT_DELAY_CMD(24),
> >  	_INIT_DCS_CMD(0xB0, 0x05),
> >  	_INIT_DCS_CMD(0xB1, 0xE5),
> >  	_INIT_DCS_CMD(0xB3, 0x52),
> > -- 
> > 2.18.0

Hi Sam:

Thanks for your reply!

Please allow me to explain, in the boe_panel_prepare function in this 
file, there will be a 6ms delay after the reset pin is pulled high 
(gpiod_set_value(boe->enable_gpio, 1)), and the initial code will be 
sent in the boe_panel_init_dcs_cmd function later, This period of time 
ensures that the delay is within the specified range.

In addition, I will add a special panel control in the V2 version, if 
you have any questions, we will discuss it later.

Best Regards!
xinlei
diff mbox series

Patch

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 857a2f0420d7..f0093035f1ff 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -780,7 +780,6 @@  static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
 };
 
 static const struct panel_init_cmd boe_init_cmd[] = {
-	_INIT_DELAY_CMD(24),
 	_INIT_DCS_CMD(0xB0, 0x05),
 	_INIT_DCS_CMD(0xB1, 0xE5),
 	_INIT_DCS_CMD(0xB3, 0x52),