[7/9] dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
Commit Message
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt. SM6350 is different because downstream and upstream
DTS have nine of the interrupts. Allow such variation.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,ipq8074-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,mdm9607-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,mdm9615-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8660-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8916-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8960-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8974-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8976-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8996-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,msm8998-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,qcm2290-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,qcs404-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sc8180x-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sdm630-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sdm670-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sdx65-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm6115-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm6125-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm6350-tlmm.yaml | 16 ++++++++++++++--
.../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm8350-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,sm8450-tlmm.yaml | 4 +++-
.../bindings/pinctrl/qcom,tlmm-common.yaml | 5 +++--
34 files changed, 113 insertions(+), 36 deletions(-)
Comments
On Fri, 30 Dec 2022 14:56:43 +0100, Krzysztof Kozlowski wrote:
> Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
> summary interrupt. SM6350 is different because downstream and upstream
> DTS have nine of the interrupts. Allow such variation.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,ipq8074-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,mdm9607-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,mdm9615-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8660-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8916-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8960-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8974-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8976-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8996-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,msm8998-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,qcm2290-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,qcs404-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sc8180x-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sdm630-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sdm670-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sdx65-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm6115-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm6125-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm6350-tlmm.yaml | 16 ++++++++++++++--
> .../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm8350-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,sm8450-tlmm.yaml | 4 +++-
> .../bindings/pinctrl/qcom,tlmm-common.yaml | 5 +++--
> 34 files changed, 113 insertions(+), 36 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
On Fri, 30 Dec 2022 14:56:43 +0100, Krzysztof Kozlowski wrote:
> Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
> summary interrupt. SM6350 is different because downstream and upstream
> DTS have nine of the interrupts. Allow such variation.
>
>
Applied, thanks!
[7/9] dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
https://git.kernel.org/krzk/linux-dt/c/12a18bb74f7500693bdfb6af2f99c05d2d43f9c6
Best regards,
@@ -19,7 +19,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
'#interrupt-cells': true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -19,7 +19,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -19,7 +19,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -26,7 +26,9 @@ properties:
- const: north
- const: east
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -26,7 +26,9 @@ properties:
- const: north
- const: south
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -28,7 +28,9 @@ properties:
- const: east
- const: south
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
'#interrupt-cells': true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -31,7 +31,9 @@ properties:
- const: center
- const: north
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -23,7 +23,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -20,7 +20,9 @@ properties:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -19,7 +19,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -26,7 +26,9 @@ properties:
- const: south
- const: east
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -27,7 +27,9 @@ properties:
- const: south
- const: east
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,10 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ minItems: 9
+ maxItems: 9
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -125,7 +128,16 @@ examples:
pinctrl@f100000 {
compatible = "qcom,sm6350-tlmm";
reg = <0x0f100000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -27,7 +27,9 @@ properties:
- const: north
- const: south
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -25,7 +25,9 @@ properties:
- const: south
- const: north
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -22,7 +22,9 @@ properties:
reg:
maxItems: 1
- interrupts: true
+ interrupts:
+ maxItems: 1
+
interrupt-controller: true
"#interrupt-cells": true
gpio-controller: true
@@ -16,8 +16,9 @@ description:
properties:
interrupts:
description:
- Specifies the TLMM summary IRQ
- maxItems: 1
+ TLMM summary IRQ and dirconn interrupts.
+ minItems: 1
+ maxItems: 9
interrupt-controller: true