Message ID | 20221014221102.7445-3-quic_molvera@quicinc.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dm21-20020a170907949500b007417e9a2c71si3431448ejc.352.2022.10.14.15.13.12; Fri, 14 Oct 2022 15:13:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=giPJ9RBg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229928AbiJNWMp (ORCPT <rfc822;ouuuleilei@gmail.com> + 99 others); Fri, 14 Oct 2022 18:12:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229926AbiJNWML (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 14 Oct 2022 18:12:11 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41AED189C15; Fri, 14 Oct 2022 15:11:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1665785513; x=1697321513; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=19lRMBFasEqUWBFZnLl5rtxmJMcHAYGIrEn6zw3Bk1U=; b=giPJ9RBgxF7XIoslMNXyw/UzE+L4+plQ551u4IOc+wUkXtFgPhYBmqeS GNP68tI+L0abF5kK9YrPNCmjO/MaM5pizN/mUXVn/TaI9s+hWU5z1ngts xTzHkya2jku0+Dj8MCGm667KJBiMvMH3YXLB0oJZg6rgUh8owlxrlpoTI s=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 14 Oct 2022 15:11:52 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 15:11:52 -0700 Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 14 Oct 2022 15:11:21 -0700 From: Melody Olvera <quic_molvera@quicinc.com> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org> CC: <linux-arm-msm@vger.kernel.org>, <dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Melody Olvera <quic_molvera@quicinc.com> Subject: [PATCH v2 2/2] dmaengine: qcom: gpi: Add compatible for QDU1000 and QRU1000 Date: Fri, 14 Oct 2022 15:11:02 -0700 Message-ID: <20221014221102.7445-3-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20221014221102.7445-1-quic_molvera@quicinc.com> References: <20221014221102.7445-1-quic_molvera@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746702819477214174?= X-GMAIL-MSGID: =?utf-8?q?1746702819477214174?= |
Series |
Add dma gpi support for QDU1000/QRU1000 SoCs
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Commit Message
Melody Olvera
Oct. 14, 2022, 10:11 p.m. UTC
Add compatible fields for the Qualcomm QDU1000 and QRU1000 SoCs.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
drivers/dma/qcom/gpi.c | 2 ++
1 file changed, 2 insertions(+)
Comments
On 14/10/2022 18:11, Melody Olvera wrote: > Add compatible fields for the Qualcomm QDU1000 and QRU1000 SoCs. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > drivers/dma/qcom/gpi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c > index cc938a31dc2d..02438735e92b 100644 > --- a/drivers/dma/qcom/gpi.c > +++ b/drivers/dma/qcom/gpi.c > @@ -2286,6 +2286,8 @@ static int gpi_probe(struct platform_device *pdev) > } > > static const struct of_device_id gpi_of_match[] = { > + { .compatible = "qcom,qdu1000-gpi-dma", .data = (void *)0x10000 }, > + { .compatible = "qcom,qru1000-gpi-dma", .data = (void *)0x10000 }, The feedback was: drop entire patch. There is really no need for this pattern to keep growing. Best regards, Krzysztof
On 15-10-22, 09:42, Krzysztof Kozlowski wrote: > On 14/10/2022 18:11, Melody Olvera wrote: > > Add compatible fields for the Qualcomm QDU1000 and QRU1000 SoCs. > > > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > > --- > > drivers/dma/qcom/gpi.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c > > index cc938a31dc2d..02438735e92b 100644 > > --- a/drivers/dma/qcom/gpi.c > > +++ b/drivers/dma/qcom/gpi.c > > @@ -2286,6 +2286,8 @@ static int gpi_probe(struct platform_device *pdev) > > } > > > > static const struct of_device_id gpi_of_match[] = { > > + { .compatible = "qcom,qdu1000-gpi-dma", .data = (void *)0x10000 }, > > + { .compatible = "qcom,qru1000-gpi-dma", .data = (void *)0x10000 }, > > The feedback was: drop entire patch. > > There is really no need for this pattern to keep growing. Right, I have picked the patches so you dont need to add yours to driver file, please check dmaengine/next
On 10/19/2022 6:30 AM, Vinod Koul wrote: > On 15-10-22, 09:42, Krzysztof Kozlowski wrote: >> On 14/10/2022 18:11, Melody Olvera wrote: >>> Add compatible fields for the Qualcomm QDU1000 and QRU1000 SoCs. >>> >>> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >>> --- >>> drivers/dma/qcom/gpi.c | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c >>> index cc938a31dc2d..02438735e92b 100644 >>> --- a/drivers/dma/qcom/gpi.c >>> +++ b/drivers/dma/qcom/gpi.c >>> @@ -2286,6 +2286,8 @@ static int gpi_probe(struct platform_device *pdev) >>> } >>> >>> static const struct of_device_id gpi_of_match[] = { >>> + { .compatible = "qcom,qdu1000-gpi-dma", .data = (void *)0x10000 }, >>> + { .compatible = "qcom,qru1000-gpi-dma", .data = (void *)0x10000 }, >> The feedback was: drop entire patch. >> >> There is really no need for this pattern to keep growing. > Right, I have picked the patches so you dont need to add yours to driver > file, please check dmaengine/next > Yes, I think I understand now; I'll just use existing compatibles and drop this PS. Thanks, Melody
diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index cc938a31dc2d..02438735e92b 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -2286,6 +2286,8 @@ static int gpi_probe(struct platform_device *pdev) } static const struct of_device_id gpi_of_match[] = { + { .compatible = "qcom,qdu1000-gpi-dma", .data = (void *)0x10000 }, + { .compatible = "qcom,qru1000-gpi-dma", .data = (void *)0x10000 }, { .compatible = "qcom,sc7280-gpi-dma", .data = (void *)0x10000 }, { .compatible = "qcom,sdm845-gpi-dma", .data = (void *)0x0 }, { .compatible = "qcom,sm6350-gpi-dma", .data = (void *)0x10000 },