Message ID | 20221225163442.2205660-9-perry.yuan@amd.com |
---|---|
State | New |
Headers |
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Sun, 25 Dec 2022 10:35:23 -0600 From: Perry Yuan <perry.yuan@amd.com> To: <rafael.j.wysocki@intel.com>, <Mario.Limonciello@amd.com>, <ray.huang@amd.com>, <viresh.kumar@linaro.org> CC: <Deepak.Sharma@amd.com>, <Nathan.Fontenot@amd.com>, <Alexander.Deucher@amd.com>, <Shimmer.Huang@amd.com>, <Xiaojian.Du@amd.com>, <Li.Meng@amd.com>, <wyes.karny@amd.com>, <linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v9 08/13] cpufreq: amd-pstate: implement suspend and resume callbacks Date: Mon, 26 Dec 2022 00:34:37 +0800 Message-ID: <20221225163442.2205660-9-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221225163442.2205660-1-perry.yuan@amd.com> References: <20221225163442.2205660-1-perry.yuan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT024:EE_|BY5PR12MB4885:EE_ X-MS-Office365-Filtering-Correlation-Id: bd86ff92-e60b-4c9f-b2ad-08dae69607b2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Implement AMD Pstate EPP Driver
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Commit Message
Yuan, Perry
Dec. 25, 2022, 4:34 p.m. UTC
From: Perry Yuan <Perry.Yuan@amd.com> add suspend and resume support for the AMD processors by amd_pstate_epp driver instance. When the CPPC is suspended, EPP driver will set EPP profile to 'power' profile and set max/min perf to lowest perf value. When resume happens, it will restore the MSR registers with previous cached value. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> --- drivers/cpufreq/amd-pstate.c | 40 ++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Comments
On 26-12-22, 00:34, Perry Yuan wrote: > From: Perry Yuan <Perry.Yuan@amd.com> > > add suspend and resume support for the AMD processors by amd_pstate_epp > driver instance. > > When the CPPC is suspended, EPP driver will set EPP profile to 'power' > profile and set max/min perf to lowest perf value. > When resume happens, it will restore the MSR registers with > previous cached value. > > Acked-by: Huang Rui <ray.huang@amd.com> > Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com> > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 40 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index c671f4955766..e3676d1a85c7 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -1041,6 +1041,44 @@ static int amd_pstate_epp_verify_policy(struct cpufreq_policy_data *policy) > return 0; > } > > +static int amd_pstate_epp_suspend(struct cpufreq_policy *policy) > +{ > + struct amd_cpudata *cpudata = policy->driver_data; > + int ret; > + > + /* avoid suspending when EPP is not enabled */ > + if (cppc_state != AMD_PSTATE_ACTIVE) > + return 0; > + > + /* set this flag to avoid setting core offline*/ > + cpudata->suspended = true; > + > + /* disable CPPC in lowlevel firmware */ > + ret = amd_pstate_enable(false); > + if (ret) > + pr_err("failed to suspend, return %d\n", ret); > + > + return 0; > +} > + > +static int amd_pstate_epp_resume(struct cpufreq_policy *policy) > +{ > + struct amd_cpudata *cpudata = policy->driver_data; > + > + if (cpudata->suspended) { When will resume get called without being suspended first ? > + mutex_lock(&amd_pstate_limits_lock); > + > + /* enable amd pstate from suspend state*/ > + amd_pstate_epp_reenable(cpudata); > + > + mutex_unlock(&amd_pstate_limits_lock); > + > + cpudata->suspended = false; > + } > + > + return 0; > +} > + > static struct cpufreq_driver amd_pstate_driver = { > .flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS, > .verify = amd_pstate_verify, > @@ -1062,6 +1100,8 @@ static struct cpufreq_driver amd_pstate_epp_driver = { > .exit = amd_pstate_epp_cpu_exit, > .offline = amd_pstate_epp_cpu_offline, > .online = amd_pstate_epp_cpu_online, > + .suspend = amd_pstate_epp_suspend, > + .resume = amd_pstate_epp_resume, > .name = "amd_pstate_epp", > .attr = amd_pstate_epp_attr, > }; > -- > 2.34.1
[AMD Official Use Only - General] Hi Viresh. > -----Original Message----- > From: Viresh Kumar <viresh.kumar@linaro.org> > Sent: Tuesday, December 27, 2022 10:52 AM > To: Yuan, Perry <Perry.Yuan@amd.com> > Cc: rafael.j.wysocki@intel.com; Limonciello, Mario > <Mario.Limonciello@amd.com>; Huang, Ray <Ray.Huang@amd.com>; > Sharma, Deepak <Deepak.Sharma@amd.com>; Fontenot, Nathan > <Nathan.Fontenot@amd.com>; Deucher, Alexander > <Alexander.Deucher@amd.com>; Huang, Shimmer > <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng, > Li (Jassmine) <Li.Meng@amd.com>; Karny, Wyes <Wyes.Karny@amd.com>; > linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v9 08/13] cpufreq: amd-pstate: implement suspend and > resume callbacks > > On 26-12-22, 00:34, Perry Yuan wrote: > > From: Perry Yuan <Perry.Yuan@amd.com> > > > > add suspend and resume support for the AMD processors by > > amd_pstate_epp driver instance. > > > > When the CPPC is suspended, EPP driver will set EPP profile to 'power' > > profile and set max/min perf to lowest perf value. > > When resume happens, it will restore the MSR registers with previous > > cached value. > > > > Acked-by: Huang Rui <ray.huang@amd.com> > > Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com> > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > > --- > > drivers/cpufreq/amd-pstate.c | 40 > > ++++++++++++++++++++++++++++++++++++ > > 1 file changed, 40 insertions(+) > > > > diff --git a/drivers/cpufreq/amd-pstate.c > > b/drivers/cpufreq/amd-pstate.c index c671f4955766..e3676d1a85c7 100644 > > --- a/drivers/cpufreq/amd-pstate.c > > +++ b/drivers/cpufreq/amd-pstate.c > > @@ -1041,6 +1041,44 @@ static int amd_pstate_epp_verify_policy(struct > cpufreq_policy_data *policy) > > return 0; > > } > > > > +static int amd_pstate_epp_suspend(struct cpufreq_policy *policy) { > > + struct amd_cpudata *cpudata = policy->driver_data; > > + int ret; > > + > > + /* avoid suspending when EPP is not enabled */ > > + if (cppc_state != AMD_PSTATE_ACTIVE) > > + return 0; > > + > > + /* set this flag to avoid setting core offline*/ > > + cpudata->suspended = true; > > + > > + /* disable CPPC in lowlevel firmware */ > > + ret = amd_pstate_enable(false); > > + if (ret) > > + pr_err("failed to suspend, return %d\n", ret); > > + > > + return 0; > > +} > > + > > +static int amd_pstate_epp_resume(struct cpufreq_policy *policy) { > > + struct amd_cpudata *cpudata = policy->driver_data; > > + > > + if (cpudata->suspended) { > > When will resume get called without being suspended first ? Sorry for the late reply. Theoretically the resume() will get called when system suspended firstly. Checking cpudata->suspended flag to make sure eachtime resume() is called to resume the previous MSR values safely in my view. Maybe we can drop the checking code, but it will take more time to run testing~ So to be safe , we can keep this, I will try to do some optimization in future. Perry. > > > + mutex_lock(&amd_pstate_limits_lock); > > + > > + /* enable amd pstate from suspend state*/ > > + amd_pstate_epp_reenable(cpudata); > > + > > + mutex_unlock(&amd_pstate_limits_lock); > > + > > + cpudata->suspended = false; > > + } > > + > > + return 0; > > +} > > + > > static struct cpufreq_driver amd_pstate_driver = { > > .flags = CPUFREQ_CONST_LOOPS | > CPUFREQ_NEED_UPDATE_LIMITS, > > .verify = amd_pstate_verify, > > @@ -1062,6 +1100,8 @@ static struct cpufreq_driver > amd_pstate_epp_driver = { > > .exit = amd_pstate_epp_cpu_exit, > > .offline = amd_pstate_epp_cpu_offline, > > .online = amd_pstate_epp_cpu_online, > > + .suspend = amd_pstate_epp_suspend, > > + .resume = amd_pstate_epp_resume, > > .name = "amd_pstate_epp", > > .attr = amd_pstate_epp_attr, > > }; > > -- > > 2.34.1 > > -- > viresh
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index c671f4955766..e3676d1a85c7 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1041,6 +1041,44 @@ static int amd_pstate_epp_verify_policy(struct cpufreq_policy_data *policy) return 0; } +static int amd_pstate_epp_suspend(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = policy->driver_data; + int ret; + + /* avoid suspending when EPP is not enabled */ + if (cppc_state != AMD_PSTATE_ACTIVE) + return 0; + + /* set this flag to avoid setting core offline*/ + cpudata->suspended = true; + + /* disable CPPC in lowlevel firmware */ + ret = amd_pstate_enable(false); + if (ret) + pr_err("failed to suspend, return %d\n", ret); + + return 0; +} + +static int amd_pstate_epp_resume(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = policy->driver_data; + + if (cpudata->suspended) { + mutex_lock(&amd_pstate_limits_lock); + + /* enable amd pstate from suspend state*/ + amd_pstate_epp_reenable(cpudata); + + mutex_unlock(&amd_pstate_limits_lock); + + cpudata->suspended = false; + } + + return 0; +} + static struct cpufreq_driver amd_pstate_driver = { .flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS, .verify = amd_pstate_verify, @@ -1062,6 +1100,8 @@ static struct cpufreq_driver amd_pstate_epp_driver = { .exit = amd_pstate_epp_cpu_exit, .offline = amd_pstate_epp_cpu_offline, .online = amd_pstate_epp_cpu_online, + .suspend = amd_pstate_epp_suspend, + .resume = amd_pstate_epp_resume, .name = "amd_pstate_epp", .attr = amd_pstate_epp_attr, };