Message ID | 20221231131945.3286639-1-bhupesh.sharma@linaro.org |
---|---|
State | New |
Headers |
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Series |
arm64: dts: qcom: sm6115: Add EUD dt node and dwc3 connector
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Commit Message
Bhupesh Sharma
Dec. 31, 2022, 1:19 p.m. UTC
Add the Embedded USB Debugger(EUD) device tree node for
SM6115 / SM4250 SoC.
The node contains EUD base register region and EUD mode
manager register regions along with the interrupt entry.
Also add the typec connector node for EUD which is attached to
EUD node via port. EUD is also attached to DWC3 node via port.
Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
- This patch is based on my earlier sm6115 usb related changes, which can
be seen here:
https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/
- This patch is also dependent on my sm6115 eud dt-binding and driver changes
sent earlier, which can be seen here:
https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/
arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
Comments
On 31.12.2022 14:19, Bhupesh Sharma wrote: > Add the Embedded USB Debugger(EUD) device tree node for > SM6115 / SM4250 SoC. > > The node contains EUD base register region and EUD mode > manager register regions along with the interrupt entry. > > Also add the typec connector node for EUD which is attached to > EUD node via port. EUD is also attached to DWC3 node via port. > > Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > - This patch is based on my earlier sm6115 usb related changes, which can > be seen here: > https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/ > - This patch is also dependent on my sm6115 eud dt-binding and driver changes > sent earlier, which can be seen here: > https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/ > > arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 030763187cc3f..c775f7fdb7015 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { > #power-domain-cells = <1>; > }; > > + eud: eud@1610000 { > + compatible = "qcom,sm6115-eud","qcom,eud"; Missing space between entries. > + reg = <0x01610000 0x2000>, > + <0x01612000 0x1000>, > + <0x003e5018 0x4>; > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > + ports { Newline before ports {}. Not sure if debugging hardware should be enabled by default.. > + port@0 { > + eud_ep: endpoint { > + remote-endpoint = <&usb2_role_switch>; > + }; > + }; Newline between subsequent nodes. > + port@1 { > + eud_con: endpoint { > + remote-endpoint = <&con_eud>; > + }; > + }; > + }; > + }; > + > + eud_typec: connector { Non-MMIO nodes don't belong under /soc. > + compatible = "usb-c-connector"; Newline between properties and subnode. > + ports { > + port@0 { > + con_eud: endpoint { > + remote-endpoint = <&eud_con>; > + }; > + }; > + }; > + }; > + > usb_hsphy: phy@1613000 { > compatible = "qcom,sm6115-qusb2-phy"; > reg = <0x01613000 0x180>; > @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { > snps,has-lpm-erratum; > snps,hird-threshold = /bits/ 8 <0x10>; > snps,usb3_lpm_capable; > + usb-role-switch; Same here. On a note, this commit + driver-side changes give me a: 1610000.eud qcom_eud: failed to get role switch Konrad > + port { > + usb2_role_switch: endpoint { > + remote-endpoint = <&eud_ep>; > + }; > + }; > }; > }; >
On 1/2/23 4:16 PM, Konrad Dybcio wrote: > > > On 31.12.2022 14:19, Bhupesh Sharma wrote: >> Add the Embedded USB Debugger(EUD) device tree node for >> SM6115 / SM4250 SoC. >> >> The node contains EUD base register region and EUD mode >> manager register regions along with the interrupt entry. >> >> Also add the typec connector node for EUD which is attached to >> EUD node via port. EUD is also attached to DWC3 node via port. >> >> Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> >> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >> --- >> - This patch is based on my earlier sm6115 usb related changes, which can >> be seen here: >> https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/ >> - This patch is also dependent on my sm6115 eud dt-binding and driver changes >> sent earlier, which can be seen here: >> https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/ >> >> arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++ >> 1 file changed, 37 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi >> index 030763187cc3f..c775f7fdb7015 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi >> @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { >> #power-domain-cells = <1>; >> }; >> >> + eud: eud@1610000 { >> + compatible = "qcom,sm6115-eud","qcom,eud"; > Missing space between entries. > >> + reg = <0x01610000 0x2000>, >> + <0x01612000 0x1000>, >> + <0x003e5018 0x4>; >> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; >> + ports { > Newline before ports {}. > > Not sure if debugging hardware should be enabled by default.. >> + port@0 { >> + eud_ep: endpoint { >> + remote-endpoint = <&usb2_role_switch>; >> + }; >> + }; > Newline between subsequent nodes. > >> + port@1 { >> + eud_con: endpoint { >> + remote-endpoint = <&con_eud>; >> + }; >> + }; >> + }; >> + }; >> + >> + eud_typec: connector { > Non-MMIO nodes don't belong under /soc. > >> + compatible = "usb-c-connector"; > Newline between properties and subnode. > > >> + ports { >> + port@0 { >> + con_eud: endpoint { >> + remote-endpoint = <&eud_con>; >> + }; >> + }; >> + }; >> + }; >> + >> usb_hsphy: phy@1613000 { >> compatible = "qcom,sm6115-qusb2-phy"; >> reg = <0x01613000 0x180>; >> @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { >> snps,has-lpm-erratum; >> snps,hird-threshold = /bits/ 8 <0x10>; >> snps,usb3_lpm_capable; >> + usb-role-switch; > Same here. For all the above points, the format is same as suggested in [1] and already used in existing dts [2]. [1]. https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/qcom/qcom%2Ceud.yaml [2]. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sc7280.dtsi#L3587 > On a note, this commit + driver-side changes give me a: > > 1610000.eud qcom_eud: failed to get role switch You need to set dr_mode = "otg", for 'usb_dwc3' to make the role switch work. Thanks, Bhupesh >> + port { >> + usb2_role_switch: endpoint { >> + remote-endpoint = <&eud_ep>; >> + }; >> + }; >> }; >> }; >>
On 2.01.2023 17:54, Bhupesh Sharma wrote: > > On 1/2/23 4:16 PM, Konrad Dybcio wrote: >> >> >> On 31.12.2022 14:19, Bhupesh Sharma wrote: >>> Add the Embedded USB Debugger(EUD) device tree node for >>> SM6115 / SM4250 SoC. >>> >>> The node contains EUD base register region and EUD mode >>> manager register regions along with the interrupt entry. >>> >>> Also add the typec connector node for EUD which is attached to >>> EUD node via port. EUD is also attached to DWC3 node via port. >>> >>> Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> >>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >>> --- >>> - This patch is based on my earlier sm6115 usb related changes, which can >>> be seen here: >>> https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/ >>> - This patch is also dependent on my sm6115 eud dt-binding and driver changes >>> sent earlier, which can be seen here: >>> https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/ >>> >>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++ >>> 1 file changed, 37 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>> index 030763187cc3f..c775f7fdb7015 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>> @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { >>> #power-domain-cells = <1>; >>> }; >>> + eud: eud@1610000 { >>> + compatible = "qcom,sm6115-eud","qcom,eud"; >> Missing space between entries. >> >>> + reg = <0x01610000 0x2000>, >>> + <0x01612000 0x1000>, >>> + <0x003e5018 0x4>; >>> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; >>> + ports { >> Newline before ports {}. >> >> Not sure if debugging hardware should be enabled by default.. >>> + port@0 { >>> + eud_ep: endpoint { >>> + remote-endpoint = <&usb2_role_switch>; >>> + }; >>> + }; >> Newline between subsequent nodes. >> >>> + port@1 { >>> + eud_con: endpoint { >>> + remote-endpoint = <&con_eud>; >>> + }; >>> + }; >>> + }; >>> + }; >>> + >>> + eud_typec: connector { >> Non-MMIO nodes don't belong under /soc. >> >>> + compatible = "usb-c-connector"; >> Newline between properties and subnode. >> >> >>> + ports { >>> + port@0 { >>> + con_eud: endpoint { >>> + remote-endpoint = <&eud_con>; >>> + }; >>> + }; >>> + }; >>> + }; >>> + >>> usb_hsphy: phy@1613000 { >>> compatible = "qcom,sm6115-qusb2-phy"; >>> reg = <0x01613000 0x180>; >>> @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { >>> snps,has-lpm-erratum; >>> snps,hird-threshold = /bits/ 8 <0x10>; >>> snps,usb3_lpm_capable; >>> + usb-role-switch; >> Same here. > > For all the above points, the format is same as suggested in [1] and already used in existing dts [2]. > > [1]. https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/qcom/qcom%2Ceud.yaml > [2]. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sc7280.dtsi#L3587 The fact that it's landed does not necessarily imply it's 100% correct.. That one seems to have slipped through review and could use some fixing up. > >> On a note, this commit + driver-side changes give me a: >> >> 1610000.eud qcom_eud: failed to get role switch > > You need to set dr_mode = "otg", for 'usb_dwc3' to make the role switch work. Thanks, couldn't find that anywhere. This however kicks me into EDL, so that's one more reason to disable it by default. Konrad> > Thanks, > Bhupesh > >>> + port { >>> + usb2_role_switch: endpoint { >>> + remote-endpoint = <&eud_ep>; >>> + }; >>> + }; >>> }; >>> }; >>>
On 2.01.2023 18:03, Konrad Dybcio wrote: > > > On 2.01.2023 17:54, Bhupesh Sharma wrote: >> >> On 1/2/23 4:16 PM, Konrad Dybcio wrote: >>> >>> >>> On 31.12.2022 14:19, Bhupesh Sharma wrote: >>>> Add the Embedded USB Debugger(EUD) device tree node for >>>> SM6115 / SM4250 SoC. >>>> >>>> The node contains EUD base register region and EUD mode >>>> manager register regions along with the interrupt entry. >>>> >>>> Also add the typec connector node for EUD which is attached to >>>> EUD node via port. EUD is also attached to DWC3 node via port. >>>> >>>> Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> >>>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >>>> --- >>>> - This patch is based on my earlier sm6115 usb related changes, which can >>>> be seen here: >>>> https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/ >>>> - This patch is also dependent on my sm6115 eud dt-binding and driver changes >>>> sent earlier, which can be seen here: >>>> https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/ >>>> >>>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++ >>>> 1 file changed, 37 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> index 030763187cc3f..c775f7fdb7015 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { >>>> #power-domain-cells = <1>; >>>> }; >>>> + eud: eud@1610000 { >>>> + compatible = "qcom,sm6115-eud","qcom,eud"; >>> Missing space between entries. >>> >>>> + reg = <0x01610000 0x2000>, >>>> + <0x01612000 0x1000>, >>>> + <0x003e5018 0x4>; >>>> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; >>>> + ports { >>> Newline before ports {}. >>> >>> Not sure if debugging hardware should be enabled by default.. >>>> + port@0 { >>>> + eud_ep: endpoint { >>>> + remote-endpoint = <&usb2_role_switch>; >>>> + }; >>>> + }; >>> Newline between subsequent nodes. >>> >>>> + port@1 { >>>> + eud_con: endpoint { >>>> + remote-endpoint = <&con_eud>; >>>> + }; >>>> + }; >>>> + }; >>>> + }; >>>> + >>>> + eud_typec: connector { >>> Non-MMIO nodes don't belong under /soc. >>> >>>> + compatible = "usb-c-connector"; >>> Newline between properties and subnode. >>> >>> >>>> + ports { >>>> + port@0 { >>>> + con_eud: endpoint { >>>> + remote-endpoint = <&eud_con>; >>>> + }; >>>> + }; >>>> + }; >>>> + }; >>>> + >>>> usb_hsphy: phy@1613000 { >>>> compatible = "qcom,sm6115-qusb2-phy"; >>>> reg = <0x01613000 0x180>; >>>> @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { >>>> snps,has-lpm-erratum; >>>> snps,hird-threshold = /bits/ 8 <0x10>; >>>> snps,usb3_lpm_capable; >>>> + usb-role-switch; >>> Same here. >> >> For all the above points, the format is same as suggested in [1] and already used in existing dts [2]. >> >> [1]. https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/qcom/qcom%2Ceud.yaml >> [2]. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sc7280.dtsi#L3587 > The fact that it's landed does not necessarily imply it's 100% correct.. > That one seems to have slipped through review and could use some fixing up. > >> >>> On a note, this commit + driver-side changes give me a: >>> >>> 1610000.eud qcom_eud: failed to get role switch >> >> You need to set dr_mode = "otg", for 'usb_dwc3' to make the role switch work. > Thanks, couldn't find that anywhere. This however kicks me into EDL, > so that's one more reason to disable it by default. > > Konrad> Update: it would probably help if I flashed the correct kernel :P Enabling EUD does in it self kick me into EDL, but the secure call responsible for setting it up returns EINVAL (just like on sony devices), so it's not gonna be much useful. Konrad >> Thanks, >> Bhupesh >> >>>> + port { >>>> + usb2_role_switch: endpoint { >>>> + remote-endpoint = <&eud_ep>; >>>> + }; >>>> + }; >>>> }; >>>> }; >>>>
On 1/2/23 10:33 PM, Konrad Dybcio wrote: > > > On 2.01.2023 17:54, Bhupesh Sharma wrote: >> >> On 1/2/23 4:16 PM, Konrad Dybcio wrote: >>> >>> >>> On 31.12.2022 14:19, Bhupesh Sharma wrote: >>>> Add the Embedded USB Debugger(EUD) device tree node for >>>> SM6115 / SM4250 SoC. >>>> >>>> The node contains EUD base register region and EUD mode >>>> manager register regions along with the interrupt entry. >>>> >>>> Also add the typec connector node for EUD which is attached to >>>> EUD node via port. EUD is also attached to DWC3 node via port. >>>> >>>> Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> >>>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >>>> --- >>>> - This patch is based on my earlier sm6115 usb related changes, which can >>>> be seen here: >>>> https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/ >>>> - This patch is also dependent on my sm6115 eud dt-binding and driver changes >>>> sent earlier, which can be seen here: >>>> https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/ >>>> >>>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++ >>>> 1 file changed, 37 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> index 030763187cc3f..c775f7fdb7015 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi >>>> @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { >>>> #power-domain-cells = <1>; >>>> }; >>>> + eud: eud@1610000 { >>>> + compatible = "qcom,sm6115-eud","qcom,eud"; >>> Missing space between entries. >>> >>>> + reg = <0x01610000 0x2000>, >>>> + <0x01612000 0x1000>, >>>> + <0x003e5018 0x4>; >>>> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; >>>> + ports { >>> Newline before ports {}. >>> >>> Not sure if debugging hardware should be enabled by default.. >>>> + port@0 { >>>> + eud_ep: endpoint { >>>> + remote-endpoint = <&usb2_role_switch>; >>>> + }; >>>> + }; >>> Newline between subsequent nodes. >>> >>>> + port@1 { >>>> + eud_con: endpoint { >>>> + remote-endpoint = <&con_eud>; >>>> + }; >>>> + }; >>>> + }; >>>> + }; >>>> + >>>> + eud_typec: connector { >>> Non-MMIO nodes don't belong under /soc. >>> >>>> + compatible = "usb-c-connector"; >>> Newline between properties and subnode. >>> >>> >>>> + ports { >>>> + port@0 { >>>> + con_eud: endpoint { >>>> + remote-endpoint = <&eud_con>; >>>> + }; >>>> + }; >>>> + }; >>>> + }; >>>> + >>>> usb_hsphy: phy@1613000 { >>>> compatible = "qcom,sm6115-qusb2-phy"; >>>> reg = <0x01613000 0x180>; >>>> @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { >>>> snps,has-lpm-erratum; >>>> snps,hird-threshold = /bits/ 8 <0x10>; >>>> snps,usb3_lpm_capable; >>>> + usb-role-switch; >>> Same here. >> >> For all the above points, the format is same as suggested in [1] and already used in existing dts [2]. >> >> [1]. https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/qcom/qcom%2Ceud.yaml >> [2]. https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sc7280.dtsi#L3587 > The fact that it's landed does not necessarily imply it's 100% correct.. > That one seems to have slipped through review and could use some fixing up. Fair enough. I will send a v2 with fixes for existing yaml documentation and dts files. >>> On a note, this commit + driver-side changes give me a: >>> >>> 1610000.eud qcom_eud: failed to get role switch >> >> You need to set dr_mode = "otg", for 'usb_dwc3' to make the role switch work. > Thanks, couldn't find that anywhere. This however kicks me into EDL, > so that's one more reason to disable it by default. Ok. BTW it works fine on my sm6115 based board, but I agree it can be left as disabled by default for now. Thanks. >>>> + port { >>>> + usb2_role_switch: endpoint { >>>> + remote-endpoint = <&eud_ep>; >>>> + }; >>>> + }; >>>> }; >>>> }; >>>>
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 030763187cc3f..c775f7fdb7015 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -565,6 +565,37 @@ gcc: clock-controller@1400000 { #power-domain-cells = <1>; }; + eud: eud@1610000 { + compatible = "qcom,sm6115-eud","qcom,eud"; + reg = <0x01610000 0x2000>, + <0x01612000 0x1000>, + <0x003e5018 0x4>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + ports { + port@0 { + eud_ep: endpoint { + remote-endpoint = <&usb2_role_switch>; + }; + }; + port@1 { + eud_con: endpoint { + remote-endpoint = <&con_eud>; + }; + }; + }; + }; + + eud_typec: connector { + compatible = "usb-c-connector"; + ports { + port@0 { + con_eud: endpoint { + remote-endpoint = <&eud_con>; + }; + }; + }; + }; + usb_hsphy: phy@1613000 { compatible = "qcom,sm6115-qusb2-phy"; reg = <0x01613000 0x180>; @@ -1064,6 +1095,12 @@ usb_dwc3: usb@4e00000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; + usb-role-switch; + port { + usb2_role_switch: endpoint { + remote-endpoint = <&eud_ep>; + }; + }; }; };