Message ID | 20221117105249.115649-2-tudor.ambarus@microchip.com |
---|---|
State | New |
Headers |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ix3-20020a170902f80300b00178b95aa01fsi582285plb.614.2022.11.17.02.54.32; Thu, 17 Nov 2022 02:54:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sRHyVYoF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239434AbiKQKxq (ORCPT <rfc822;just.gull.subs@gmail.com> + 99 others); Thu, 17 Nov 2022 05:53:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234058AbiKQKxG (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 17 Nov 2022 05:53:06 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D51275E9E5; Thu, 17 Nov 2022 02:52:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1668682377; x=1700218377; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gNtn9WfsbwYVLh4+RkqUoRwPVNMtyYltmpBOWMDfWsw=; b=sRHyVYoFhEXKVU58uS4G4lS9tKNIIeHwI7o5d1sT6uHzqZotaqPR8JgY GE5VuxTTjqUNDlJ7/9y165D2U/voNyLsmf+U3qT8CFObA+3zkyl9c3W5D RNxPujqFzSGS1bPWzk2/+YPG/i0pxiKfMOOfvqJKVv4EfG07tk88kcIS2 DK8gje8bJKJAPN5UtIPWxHw2ReVTh8UX8OUwjDkEO2rJNEfgVQerhu7q9 UzkSE6EIshgToMfLPyy+OoqLBxcQSfn2a1IbIA7Zw9LnnYhBP/4TIwle+ Z4s8nKRzsya8PHEyqlK+GFkauoQBzKNe+bAeWCLcWcL7EQ3YRCOwHnvgF A==; X-IronPort-AV: E=Sophos;i="5.96,171,1665471600"; d="scan'208";a="123873129" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Nov 2022 03:52:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 17 Nov 2022 03:52:56 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 17 Nov 2022 03:52:53 -0700 From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <broonie@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com> CC: <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mtd@lists.infradead.org>, Tudor Ambarus <tudor.ambarus@microchip.com> Subject: [PATCH 1/8] spi: dt-bindings: Introduce spi-cs-setup-ns property Date: Thu, 17 Nov 2022 12:52:42 +0200 Message-ID: <20221117105249.115649-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117105249.115649-1-tudor.ambarus@microchip.com> References: <20221117105249.115649-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749740406081505382?= X-GMAIL-MSGID: =?utf-8?q?1749740406081505382?= |
Series |
spi: Introduce spi-cs-setup-ns dt property
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Commit Message
Tudor Ambarus
Nov. 17, 2022, 10:52 a.m. UTC
SPI NOR flashes have specific cs-setup time requirements without which
they can't work at frequencies close to their maximum supported frequency,
as they miss the first bits of the instruction command. Unrecognized
commands are ignored, thus the flash will be unresponsive. Introduce the
spi-cs-setup-ns property to allow spi devices to specify their cs setup
time.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
.../devicetree/bindings/spi/spi-peripheral-props.yaml | 5 +++++
1 file changed, 5 insertions(+)
Comments
From: Tudor Ambarus <tudor.ambarus@microchip.com> > diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml > index dca677f9e1b9..ead2cccf658f 100644 > --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml > +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml > @@ -44,6 +44,11 @@ properties: > description: > Maximum SPI clocking speed of the device in Hz. > > + spi-cs-setup-ns: > + description: > + Delay in nanosecods to be introduced by the controller after CS is > + asserted. > + Does this need a type as the spi-cs-setup-ns is apparently just 16bit? At least the driver uses it that way. But IMHO this should just be a normal uint32 value to be consistent with all the other properties. Also the max value with 16bit will be 'just' 65us. -michael
On Fri, Nov 18, 2022 at 03:14:58PM +0100, Michael Walle wrote: > From: Tudor Ambarus <tudor.ambarus@microchip.com> > > + spi-cs-setup-ns: > > + description: > > + Delay in nanosecods to be introduced by the controller after CS is > > + asserted. > Does this need a type as the spi-cs-setup-ns is apparently just 16bit? At > least the driver uses it that way. > But IMHO this should just be a normal uint32 value to be consistent with > all the other properties. Also the max value with 16bit will be 'just' > 65us. Making it 32 bit does seem safer. I've applied the series already, mainly for the reintroduction of spi_set_cs_timing() since there was another driver that needed it, but we can still fix things up until the merge window.
Hi, On 18.11.2022 17:30, Mark Brown wrote: > On Fri, Nov 18, 2022 at 03:14:58PM +0100, Michael Walle wrote: >> From: Tudor Ambarus <tudor.ambarus@microchip.com> > >>> + spi-cs-setup-ns: >>> + description: >>> + Delay in nanosecods to be introduced by the controller after CS is >>> + asserted. > >> Does this need a type as the spi-cs-setup-ns is apparently just 16bit? At >> least the driver uses it that way. > >> But IMHO this should just be a normal uint32 value to be consistent with >> all the other properties. Also the max value with 16bit will be 'just' >> 65us. > > Making it 32 bit does seem safer. I've applied the series Thanks. There are few implications to consider before making this prop a u32, and I'd like to check them with you. struct spi_delay will have to be updated to have a u32 value, now it's a u16. This means that we'll have to update spi_delay_to_ns() to either return a s64 or to add a u64 *delay parameter to the function so that we can still handle the conversions from usecs and the error codes in the SPI_DELAY_UNIT_SCK case. Then all its callers have to be updated to consider the u64 delay. I don't know what to say, I'm in between. 65us delays are improbable, but I'm fine to update this as well. Let me know your preference. Thanks, ta
Hi, Am 2023-01-02 10:37, schrieb Tudor Ambarus: > Hi, > > On 18.11.2022 17:30, Mark Brown wrote: >> On Fri, Nov 18, 2022 at 03:14:58PM +0100, Michael Walle wrote: >>> From: Tudor Ambarus <tudor.ambarus@microchip.com> >> >>>> + spi-cs-setup-ns: >>>> + description: >>>> + Delay in nanosecods to be introduced by the controller after >>>> CS is >>>> + asserted. >> >>> Does this need a type as the spi-cs-setup-ns is apparently just >>> 16bit? At >>> least the driver uses it that way. >> >>> But IMHO this should just be a normal uint32 value to be consistent >>> with >>> all the other properties. Also the max value with 16bit will be >>> 'just' >>> 65us. >> >> Making it 32 bit does seem safer. I've applied the series > > Thanks. There are few implications to consider before making this prop > a > u32, and I'd like to check them with you. > > struct spi_delay will have to be updated to have a u32 value, now it's > a > u16. This means that we'll have to update spi_delay_to_ns() to either > return a s64 or to add a u64 *delay parameter to the function so that > we > can still handle the conversions from usecs and the error codes in the > SPI_DELAY_UNIT_SCK case. Then all its callers have to be updated to > consider the u64 delay. I was talking about the device tree property. Even if the driver continue to use just 16bit, the DT property could be 32bit IMHO. At the moment, the schema says its 32bit (if I'm not mistaken, because it doesn't have a type), but the driver will parse the property as 16bit and your device tree also has this /bits/ thingy. So regardless if the driver is using 16bit or 32bit for the value, there seems to be a discrepancy between the schema and the devicetree (and driver). All other properties are just the regular 32bit values, thus I was suggesting to change the DT property to 32bit. -michael > I don't know what to say, I'm in between. 65us delays are improbable, > but I'm fine to update this as well. Let me know your preference. > > Thanks, > ta
On 02.01.2023 13:48, Michael Walle wrote: > Hi, Hi, > > Am 2023-01-02 10:37, schrieb Tudor Ambarus: >> Hi, >> >> On 18.11.2022 17:30, Mark Brown wrote: >>> On Fri, Nov 18, 2022 at 03:14:58PM +0100, Michael Walle wrote: >>>> From: Tudor Ambarus <tudor.ambarus@microchip.com> >>> >>>>> + spi-cs-setup-ns: >>>>> + description: >>>>> + Delay in nanosecods to be introduced by the controller after >>>>> CS is >>>>> + asserted. >>> >>>> Does this need a type as the spi-cs-setup-ns is apparently just >>>> 16bit? At >>>> least the driver uses it that way. >>> >>>> But IMHO this should just be a normal uint32 value to be consistent >>>> with >>>> all the other properties. Also the max value with 16bit will be 'just' >>>> 65us. >>> >>> Making it 32 bit does seem safer. I've applied the series >> >> Thanks. There are few implications to consider before making this prop a >> u32, and I'd like to check them with you. >> >> struct spi_delay will have to be updated to have a u32 value, now it's a >> u16. This means that we'll have to update spi_delay_to_ns() to either >> return a s64 or to add a u64 *delay parameter to the function so that we >> can still handle the conversions from usecs and the error codes in the >> SPI_DELAY_UNIT_SCK case. Then all its callers have to be updated to >> consider the u64 delay. > > I was talking about the device tree property. Even if the driver continue > to use just 16bit, the DT property could be 32bit IMHO. but then you'll have an implicit cast to u16 at: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi.c#n2314 which will make the u32 dt prop misleading. > > At the moment, the schema says its 32bit (if I'm not mistaken, because > it doesn't have a type), but the driver will parse the property as > 16bit and your device tree also has this /bits/ thingy. So regardless > if the driver is using 16bit or 32bit for the value, there seems to be > a discrepancy between the schema and the devicetree (and driver). okay, thanks for pointing it out. Let's decide how we fix this. > > All other properties are just the regular 32bit values, thus I was > suggesting to change the DT property to 32bit. If we want to change the dt prop to 32bit I think we should also handle the parsed value as u32, not as u16.
>>>>>> + spi-cs-setup-ns: >>>>>> + description: >>>>>> + Delay in nanosecods to be introduced by the controller >>>>>> after CS is >>>>>> + asserted. >>>> >>>>> Does this need a type as the spi-cs-setup-ns is apparently just >>>>> 16bit? At >>>>> least the driver uses it that way. >>>> >>>>> But IMHO this should just be a normal uint32 value to be consistent >>>>> with >>>>> all the other properties. Also the max value with 16bit will be >>>>> 'just' >>>>> 65us. >>>> >>>> Making it 32 bit does seem safer. I've applied the series >>> >>> Thanks. There are few implications to consider before making this >>> prop a >>> u32, and I'd like to check them with you. >>> >>> struct spi_delay will have to be updated to have a u32 value, now >>> it's a >>> u16. This means that we'll have to update spi_delay_to_ns() to either >>> return a s64 or to add a u64 *delay parameter to the function so that >>> we >>> can still handle the conversions from usecs and the error codes in >>> the >>> SPI_DELAY_UNIT_SCK case. Then all its callers have to be updated to >>> consider the u64 delay. >> >> I was talking about the device tree property. Even if the driver >> continue >> to use just 16bit, the DT property could be 32bit IMHO. > > but then you'll have an implicit cast to u16 at: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi.c#n2314 > which will make the u32 dt prop misleading. Nothing will prevent you from checking for a valid range and return an error :) But I agree, that converting the u16 to u32 in the driver is probably the better way. >> At the moment, the schema says its 32bit (if I'm not mistaken, because >> it doesn't have a type), but the driver will parse the property as >> 16bit and your device tree also has this /bits/ thingy. So regardless >> if the driver is using 16bit or 32bit for the value, there seems to be >> a discrepancy between the schema and the devicetree (and driver). > > okay, thanks for pointing it out. Let's decide how we fix this. > >> >> All other properties are just the regular 32bit values, thus I was >> suggesting to change the DT property to 32bit. > > If we want to change the dt prop to 32bit I think we should also handle > the parsed value as u32, not as u16. Strictly speaking, your device tree is wrong, because the schema already says it's 32bit. -michael
diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index dca677f9e1b9..ead2cccf658f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -44,6 +44,11 @@ properties: description: Maximum SPI clocking speed of the device in Hz. + spi-cs-setup-ns: + description: + Delay in nanosecods to be introduced by the controller after CS is + asserted. + spi-rx-bus-width: description: Bus width to the SPI bus used for read transfers.