[1/2] dt-bindings: power: Add Allwinner D1 PPU

Message ID 20221231160402.16157-2-samuel@sholland.org
State New
Headers
Series Allwinner power domain support |

Commit Message

Samuel Holland Dec. 31, 2022, 4:04 p.m. UTC
  The Allwinner D1 family of SoCs contain a "PPU" power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle. Other recent
Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 .../power/allwinner,sun20i-d1-ppu.yaml        | 54 +++++++++++++++++++
 .../power/allwinner,sun20i-d1-ppu.h           | 10 ++++
 2 files changed, 64 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
 create mode 100644 include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
  

Comments

Krzysztof Kozlowski Dec. 31, 2022, 6:58 p.m. UTC | #1
On 31/12/2022 17:04, Samuel Holland wrote:
> The Allwinner D1 family of SoCs contain a "PPU" power domain controller
> separate from the PRCM. It can power down the video engine and DSP, and
> it contains special logic for hardware-assisted CPU idle. Other recent
> Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>  .../power/allwinner,sun20i-d1-ppu.yaml        | 54 +++++++++++++++++++
>  .../power/allwinner,sun20i-d1-ppu.h           | 10 ++++
>  2 files changed, 64 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
>  create mode 100644 include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
> 
> diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
> new file mode 100644
> index 000000000000..64c9a9f398a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner SoCs "PPU" power domain controller

Drop quotes over "PPU" - it's not some nickname, alias, but acronym.
Explain the acronym in description.


> +
> +maintainers:
> +  - Samuel Holland <samuel@sholland.org>
> +
> +description:
> +  D1 and related SoCs contain a power domain controller for the CPUs, GPU, and
> +  video-related hardware.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - allwinner,sun20i-d1-ppu
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    description: Bus Clock
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  '#power-domain-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - resets
> +  - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
> +    #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
> +
> +    ppu: power-controller@7001000 {
> +            compatible = "allwinner,sun20i-d1-ppu";

Use 4 spaces for example indentation.

With above:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
  
Samuel Holland Dec. 31, 2022, 7:12 p.m. UTC | #2
On 12/31/22 12:58, Krzysztof Kozlowski wrote:
> On 31/12/2022 17:04, Samuel Holland wrote:
>> The Allwinner D1 family of SoCs contain a "PPU" power domain controller
>> separate from the PRCM. It can power down the video engine and DSP, and
>> it contains special logic for hardware-assisted CPU idle. Other recent
>> Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>>  .../power/allwinner,sun20i-d1-ppu.yaml        | 54 +++++++++++++++++++
>>  .../power/allwinner,sun20i-d1-ppu.h           | 10 ++++
>>  2 files changed, 64 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
>>  create mode 100644 include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
>>
>> diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
>> new file mode 100644
>> index 000000000000..64c9a9f398a2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
>> @@ -0,0 +1,54 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Allwinner SoCs "PPU" power domain controller
> 
> Drop quotes over "PPU" - it's not some nickname, alias, but acronym.
> Explain the acronym in description.

I don't know what the acronym stands for; it is never spelled out in the
vendor code. I will drop the quotes in v2, but I can't give an explanation.

Regards,
Samuel
  

Patch

diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
new file mode 100644
index 000000000000..64c9a9f398a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
@@ -0,0 +1,54 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner SoCs "PPU" power domain controller
+
+maintainers:
+  - Samuel Holland <samuel@sholland.org>
+
+description:
+  D1 and related SoCs contain a power domain controller for the CPUs, GPU, and
+  video-related hardware.
+
+properties:
+  compatible:
+    enum:
+      - allwinner,sun20i-d1-ppu
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description: Bus Clock
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  '#power-domain-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+  - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
+    #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
+
+    ppu: power-controller@7001000 {
+            compatible = "allwinner,sun20i-d1-ppu";
+            reg = <0x7001000 0x1000>;
+            clocks = <&r_ccu CLK_BUS_R_PPU>;
+            resets = <&r_ccu RST_BUS_R_PPU>;
+            #power-domain-cells = <1>;
+    };
diff --git a/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h b/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
new file mode 100644
index 000000000000..23cfb57256d6
--- /dev/null
+++ b/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
@@ -0,0 +1,10 @@ 
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+
+#ifndef _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
+#define _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
+
+#define PD_CPU			0
+#define PD_VE			1
+#define PD_DSP			2
+
+#endif /* _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_ */