| Message ID | 20221222133123.50676-3-manivannan.sadhasivam@linaro.org |
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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org
Cc: bhelgaas@google.com, konrad.dybcio@linaro.org,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v2 2/3] dt-bindings: PCI: qcom: Document msi-map and
msi-map-mask properties
Date: Thu, 22 Dec 2022 19:01:22 +0530
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| Series |
Qcom: Add GIC-ITS support to SM8450 PCIe controllers
|
|
Commit Message
Manivannan Sadhasivam
Dec. 22, 2022, 1:31 p.m. UTC
The Qcom PCIe controller is capable of using either internal MSI controller
or the external GIC-ITS for receiving the MSIs from endpoint devices.
Currently, the binding only documents the internal MSI implementation.
Let's document the GIC-ITS imeplementation by making use of msi-map and
msi-map-mask properties. Only one of the implementation should be used
at a time.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
Comments
On Thu, Dec 22, 2022 at 07:01:22PM +0530, Manivannan Sadhasivam wrote: > The Qcom PCIe controller is capable of using either internal MSI controller > or the external GIC-ITS for receiving the MSIs from endpoint devices. > Currently, the binding only documents the internal MSI implementation. > > Let's document the GIC-ITS imeplementation by making use of msi-map and > msi-map-mask properties. Only one of the implementation should be used > at a time. Isn't that up to the OS to decide? Some versions may not support MSIs. What about legacy interrupts? Don't you need to keep the interrupt properties for them? > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 02450fb26bb9..10fec6a7abfc 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -104,14 +104,20 @@ required: > - compatible > - reg > - reg-names > - - interrupts > - - interrupt-names > - - "#interrupt-cells" > - interrupt-map-mask > - interrupt-map > - clocks > - clock-names > > +oneOf: > + - required: > + - interrupts > + - interrupt-names > + - "#interrupt-cells" > + - required: > + - msi-map > + - msi-map-mask > + > allOf: > - $ref: /schemas/pci/pci-bus.yaml# > - if: > -- > 2.25.1 > >
On Thu, Dec 22, 2022 at 01:01:41PM -0600, Rob Herring wrote: > On Thu, Dec 22, 2022 at 07:01:22PM +0530, Manivannan Sadhasivam wrote: > > The Qcom PCIe controller is capable of using either internal MSI controller > > or the external GIC-ITS for receiving the MSIs from endpoint devices. > > Currently, the binding only documents the internal MSI implementation. > > > > Let's document the GIC-ITS imeplementation by making use of msi-map and > > msi-map-mask properties. Only one of the implementation should be used > > at a time. > > Isn't that up to the OS to decide? Some versions may not support MSIs. > Yes, OS may choose either of them but the controller supports both and only one implementation can be used at a time. AFAIK, all of the SoCs supported in upstream support both MSI and legacy interrupts. > What about legacy interrupts? Don't you need to keep the interrupt > properties for them? > We have "interrupt-map-mask" and "interrupt-map" properties for legacy interrupts. Thanks, Mani > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- > > 1 file changed, 9 insertions(+), 3 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > index 02450fb26bb9..10fec6a7abfc 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > @@ -104,14 +104,20 @@ required: > > - compatible > > - reg > > - reg-names > > - - interrupts > > - - interrupt-names > > - - "#interrupt-cells" > > - interrupt-map-mask > > - interrupt-map > > - clocks > > - clock-names > > > > +oneOf: > > + - required: > > + - interrupts > > + - interrupt-names > > + - "#interrupt-cells" > > + - required: > > + - msi-map > > + - msi-map-mask > > + > > allOf: > > - $ref: /schemas/pci/pci-bus.yaml# > > - if: > > -- > > 2.25.1 > > > >
On Thu, Dec 22, 2022 at 07:01:22PM +0530, Manivannan Sadhasivam wrote: > The Qcom PCIe controller is capable of using either internal MSI controller > or the external GIC-ITS for receiving the MSIs from endpoint devices. "For signaling MSIs sent by endpoint devices" > Currently, the binding only documents the internal MSI implementation. > > Let's document the GIC-ITS imeplementation by making use of msi-map and > msi-map-mask properties. Only one of the implementation should be used > at a time. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 02450fb26bb9..10fec6a7abfc 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -104,14 +104,20 @@ required: > - compatible > - reg > - reg-names > - - interrupts > - - interrupt-names > - - "#interrupt-cells" > - interrupt-map-mask > - interrupt-map > - clocks > - clock-names > > +oneOf: > + - required: > + - interrupts > + - interrupt-names > + - "#interrupt-cells" > + - required: > + - msi-map > + - msi-map-mask > + > allOf: > - $ref: /schemas/pci/pci-bus.yaml# > - if: > -- > 2.25.1 >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 02450fb26bb9..10fec6a7abfc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -104,14 +104,20 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - - "#interrupt-cells" - interrupt-map-mask - interrupt-map - clocks - clock-names +oneOf: + - required: + - interrupts + - interrupt-names + - "#interrupt-cells" + - required: + - msi-map + - msi-map-mask + allOf: - $ref: /schemas/pci/pci-bus.yaml# - if: