Message ID | 20221223161835.112079-3-krzysztof.kozlowski@linaro.org |
---|---|
State | New |
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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id n18-20020a05651203f200b004b4f2a30e6csm581360lfq.0.2022.12.23.08.18.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Dec 2022 08:18:43 -0800 (PST) From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Wesley Cheng <quic_wcheng@quicinc.com>, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH 3/4] ARM: dts: qcom: sdx65: add specific compatible for USB HS PHY Date: Fri, 23 Dec 2022 17:18:34 +0100 Message-Id: <20221223161835.112079-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221223161835.112079-1-krzysztof.kozlowski@linaro.org> References: <20221223161835.112079-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1753022414070125429?= X-GMAIL-MSGID: =?utf-8?q?1753022414070125429?= |
Series |
[1/4] dt-bindings: phy: qcom,usb-snps-femto-v2: use fallback compatibles
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Commit Message
Krzysztof Kozlowski
Dec. 23, 2022, 4:18 p.m. UTC
Add SoC-specific compatible to the USB HS PHY to match other devices and
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Comments
On 23.12.2022 17:18, Krzysztof Kozlowski wrote: > Add SoC-specific compatible to the USB HS PHY to match other devices and > bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi > index b073e0c63df4..d3c661d7650d 100644 > --- a/arch/arm/boot/dts/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi > @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { > }; > > usb_hsphy: phy@ff4000 { > - compatible = "qcom,usb-snps-hs-7nm-phy"; > + compatible = "qcom,sdx65-usb-hs-phy", > + "qcom,usb-snps-hs-7nm-phy"; Not sure if the newline is necessary, but still: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > reg = <0xff4000 0x120>; > #phy-cells = <0>; > status = "disabled";
On 23/12/2022 17:20, Konrad Dybcio wrote: > > > On 23.12.2022 17:18, Krzysztof Kozlowski wrote: >> Add SoC-specific compatible to the USB HS PHY to match other devices and >> bindings. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >> index b073e0c63df4..d3c661d7650d 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >> @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { >> }; >> >> usb_hsphy: phy@ff4000 { >> - compatible = "qcom,usb-snps-hs-7nm-phy"; >> + compatible = "qcom,sdx65-usb-hs-phy", >> + "qcom,usb-snps-hs-7nm-phy"; > Not sure if the newline is necessary, but still: > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> It is over 80 - up to 90 - and we still keep 80-limit in coding style. Best regards, Krzysztof
On 24.12.2022 14:12, Krzysztof Kozlowski wrote: > On 23/12/2022 17:20, Konrad Dybcio wrote: >> >> >> On 23.12.2022 17:18, Krzysztof Kozlowski wrote: >>> Add SoC-specific compatible to the USB HS PHY to match other devices and >>> bindings. >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> --- >>> arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> index b073e0c63df4..d3c661d7650d 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { >>> }; >>> >>> usb_hsphy: phy@ff4000 { >>> - compatible = "qcom,usb-snps-hs-7nm-phy"; >>> + compatible = "qcom,sdx65-usb-hs-phy", >>> + "qcom,usb-snps-hs-7nm-phy"; >> Not sure if the newline is necessary, but still: >> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > It is over 80 - up to 90 - and we still keep 80-limit in coding style. Torvalds said 100 is fine a year a go or so. Konrad > > Best regards, > Krzysztof >
On 27/12/2022 12:14, Konrad Dybcio wrote: > > > On 24.12.2022 14:12, Krzysztof Kozlowski wrote: >> On 23/12/2022 17:20, Konrad Dybcio wrote: >>> >>> >>> On 23.12.2022 17:18, Krzysztof Kozlowski wrote: >>>> Add SoC-specific compatible to the USB HS PHY to match other devices and >>>> bindings. >>>> >>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>>> --- >>>> arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- >>>> 1 file changed, 2 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> index b073e0c63df4..d3c661d7650d 100644 >>>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>>> @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { >>>> }; >>>> >>>> usb_hsphy: phy@ff4000 { >>>> - compatible = "qcom,usb-snps-hs-7nm-phy"; >>>> + compatible = "qcom,sdx65-usb-hs-phy", >>>> + "qcom,usb-snps-hs-7nm-phy"; >>> Not sure if the newline is necessary, but still: >>> >>> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> >> It is over 80 - up to 90 - and we still keep 80-limit in coding style. > Torvalds said 100 is fine a year a go or so. Yes - when it increases the readability. When it does not, the limit by coding style is still 80. Otherwise the coding style would be updated, which did not happen: https://lore.kernel.org/all/20220119160642.140e84c6@gandalf.local.home/ Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index b073e0c63df4..d3c661d7650d 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { }; usb_hsphy: phy@ff4000 { - compatible = "qcom,usb-snps-hs-7nm-phy"; + compatible = "qcom,sdx65-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; reg = <0xff4000 0x120>; #phy-cells = <0>; status = "disabled";