diff mbox series

RISC-V: Fix muti-line condition format

Message ID 20221219230935.89797-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V: Fix muti-line condition format |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Dec. 19, 2022, 11:09 p.m. UTC 
  From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional.
        (vsetvl_insn_p): Ditto.
        (same_bb_and_before_p): Ditto.
        (same_bb_and_after_or_equal_p): Ditto.

---
 gcc/config/riscv/riscv-vsetvl.cc | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Jeff Law Dec. 20, 2022, 12:27 a.m. UTC | #1 
On 12/19/22 16:09, juzhe.zhong@rivai.ai wrote:
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
> 
> gcc/ChangeLog:
> 
>          * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional.
>          (vsetvl_insn_p): Ditto.
>          (same_bb_and_before_p): Ditto.
>          (same_bb_and_after_or_equal_p): Ditto.
OK
jeff
Kito Cheng Dec. 23, 2022, 5:43 a.m. UTC | #2 
Committed, thanks :)

On Tue, Dec 20, 2022 at 8:28 AM Jeff Law via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
>
>
> On 12/19/22 16:09, juzhe.zhong@rivai.ai wrote:
> > From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
> >
> > gcc/ChangeLog:
> >
> >          * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional.
> >          (vsetvl_insn_p): Ditto.
> >          (same_bb_and_before_p): Ditto.
> >          (same_bb_and_after_or_equal_p): Ditto.
> OK
> jeff
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 3ca3fc15e5a..0c2ff630e96 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -112,8 +112,8 @@  vlmax_avl_p (rtx x)
 static bool
 vlmax_avl_insn_p (rtx_insn *rinsn)
 {
-  return INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi
-	 || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi;
+  return (INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi
+	  || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi);
 }
 
 static bool
@@ -156,24 +156,24 @@  vector_config_insn_p (rtx_insn *rinsn)
 static bool
 vsetvl_insn_p (rtx_insn *rinsn)
 {
-  return INSN_CODE (rinsn) == CODE_FOR_vsetvldi
-	 || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi;
+  return (INSN_CODE (rinsn) == CODE_FOR_vsetvldi
+	 || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi);
 }
 
 /* Return true if INSN1 comes befeore INSN2 in the same block.  */
 static bool
 same_bb_and_before_p (const insn_info *insn1, const insn_info *insn2)
 {
-  return (insn1->bb ()->index () == insn2->bb ()->index ())
-	 && (*insn1 < *insn2);
+  return ((insn1->bb ()->index () == insn2->bb ()->index ())
+	 && (*insn1 < *insn2));
 }
 
 /* Return true if INSN1 comes after or equal INSN2 in the same block.  */
 static bool
 same_bb_and_after_or_equal_p (const insn_info *insn1, const insn_info *insn2)
 {
-  return (insn1->bb ()->index () == insn2->bb ()->index ())
-	 && (*insn1 >= *insn2);
+  return ((insn1->bb ()->index () == insn2->bb ()->index ())
+	 && (*insn1 >= *insn2));
 }
 
 /* An "anticipatable occurrence" is one that is the first occurrence in the