Message ID | 20221220011247.35560-8-hal.feng@starfivetech.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o12-20020a63730c000000b00476e63cfd0fsi11873452pgc.466.2022.12.19.17.14.03; Mon, 19 Dec 2022 17:14:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232546AbiLTBNV convert rfc822-to-8bit (ORCPT <rfc822;abdi.embedded@gmail.com> + 99 others); Mon, 19 Dec 2022 20:13:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232880AbiLTBM6 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 19 Dec 2022 20:12:58 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D95A811C15; Mon, 19 Dec 2022 17:12:56 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id B428424E19A; Tue, 20 Dec 2022 09:12:55 +0800 (CST) Received: from EXMBX172.cuchost.com (172.16.6.92) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 20 Dec 2022 09:12:55 +0800 Received: from ubuntu.localdomain (183.27.97.120) by EXMBX172.cuchost.com (172.16.6.92) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 20 Dec 2022 09:12:54 +0800 From: Hal Feng <hal.feng@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org> CC: Conor Dooley <conor@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, "Thomas Gleixner" <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, "Philipp Zabel" <p.zabel@pengutronix.de>, Linus Walleij <linus.walleij@linaro.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Date: Tue, 20 Dec 2022 09:12:47 +0800 Message-ID: <20221220011247.35560-8-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220011247.35560-1-hal.feng@starfivetech.com> References: <20221220011247.35560-1-hal.feng@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [183.27.97.120] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX172.cuchost.com (172.16.6.92) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752693585564009894?= X-GMAIL-MSGID: =?utf-8?q?1752693585564009894?= |
Series |
Basic device tree support for StarFive JH7110 RISC-V SoC
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Commit Message
Hal Feng
Dec. 20, 2022, 1:12 a.m. UTC
From: Emil Renner Berthing <kernel@esmil.dk> Add a minimal device tree for StarFive JH7110 VisionFive 2 board which has version A and version B. Support booting and basic clock/reset/pinctrl/uart drivers. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../jh7110-starfive-visionfive-2-va.dts | 13 ++ .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ 4 files changed, 138 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
Comments
On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > Add a minimal device tree for StarFive JH7110 VisionFive 2 board > which has version A and version B. Support booting and basic > clock/reset/pinctrl/uart drivers. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > .../jh7110-starfive-visionfive-2-va.dts | 13 ++ > .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ > .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ > 4 files changed, 138 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > index 0ea1bc15ab30..79e925a4a227 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0 > dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb Could you rebase on top of v6.2-rc1 when you submit your next version squash this in please (unless Emil hates it): diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index c38a9ade7f48..b3744420253a 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb -dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-starfive-visionfive-v1.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-vb.dtb I'd rather have more, but easier to read lines than long ones. > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > new file mode 100644 > index 000000000000..c60280b89c73 > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -0,0 +1,111 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > + */ > + > +/dts-v1/; > +#include "jh7110.dtsi" > +#include "jh7110-pinfunc.h" > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + cpus { > + timebase-frequency = <4000000>; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0x0 0x40000000 0x1 0x0>; Is this a good idea when you have SKUs with 2, 4 & 8 GiB of DDR? Anyways, I can't review this as I've got neither board nor documentation, so with the above stuff sorted out: Acked-by: Conor Dooley <conor.dooley@microchip.com> I'll not apply it until the clock binding header is in my tree. Thanks, Conor.
On Tue, 20 Dec 2022 21:26:07 +0000, Conor Dooley wrote: > On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote: > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > Add a minimal device tree for StarFive JH7110 VisionFive 2 board > > which has version A and version B. Support booting and basic > > clock/reset/pinctrl/uart drivers. > > > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > > --- > > arch/riscv/boot/dts/starfive/Makefile | 1 + > > .../jh7110-starfive-visionfive-2-va.dts | 13 ++ > > .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ > > .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ > > 4 files changed, 138 insertions(+) > > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > > index 0ea1bc15ab30..79e925a4a227 100644 > > --- a/arch/riscv/boot/dts/starfive/Makefile > > +++ b/arch/riscv/boot/dts/starfive/Makefile > > @@ -1,2 +1,3 @@ > > # SPDX-License-Identifier: GPL-2.0 > > dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb > > Could you rebase on top of v6.2-rc1 when you submit your next version Sure. > squash this in please (unless Emil hates it): > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > index c38a9ade7f48..b3744420253a 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -1,3 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb > -dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-starfive-visionfive-v1.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-vb.dtb > > I'd rather have more, but easier to read lines than long ones. I'm fine with this change. If no objection, I will modify it. Best regards, Hal > > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > new file mode 100644 > > index 000000000000..c60280b89c73 > > --- /dev/null > > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > @@ -0,0 +1,111 @@ > > +// SPDX-License-Identifier: GPL-2.0 OR MIT > > +/* > > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > > + */ > > + > > +/dts-v1/; > > +#include "jh7110.dtsi" > > +#include "jh7110-pinfunc.h" > > +#include <dt-bindings/gpio/gpio.h> > > + > > +/ { > > + aliases { > > + serial0 = &uart0; > > + }; > > + > > + chosen { > > + stdout-path = "serial0:115200n8"; > > + }; > > + > > + cpus { > > + timebase-frequency = <4000000>; > > + }; > > + > > + memory@40000000 { > > + device_type = "memory"; > > + reg = <0x0 0x40000000 0x1 0x0>; > > Is this a good idea when you have SKUs with 2, 4 & 8 GiB of DDR? The VisionFive 2 board only has 4GB version and 8GB version now. Before linux startup, we will change this property in dtb through u-boot to make sure the board can boot up with the correct memory size. Best regards, Hal > > Anyways, I can't review this as I've got neither board nor > documentation, so with the above stuff sorted out: > Acked-by: Conor Dooley <conor.dooley@microchip.com> > I'll not apply it until the clock binding header is in my tree.
On Fri, Dec 23, 2022 at 11:12:34AM +0800, Hal Feng wrote: > On Tue, 20 Dec 2022 21:26:07 +0000, Conor Dooley wrote: > > On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote: > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > Add a minimal device tree for StarFive JH7110 VisionFive 2 board > > > which has version A and version B. Support booting and basic > > > clock/reset/pinctrl/uart drivers. > > > > > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > > > Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > > > --- > > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > > new file mode 100644 > > > index 000000000000..c60280b89c73 > > > --- /dev/null > > > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > > @@ -0,0 +1,111 @@ > > > +// SPDX-License-Identifier: GPL-2.0 OR MIT > > > +/* > > > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > > > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > > > + */ > > > + > > > +/dts-v1/; > > > +#include "jh7110.dtsi" > > > +#include "jh7110-pinfunc.h" > > > +#include <dt-bindings/gpio/gpio.h> > > > + > > > +/ { > > > + aliases { > > > + serial0 = &uart0; > > > + }; > > > + > > > + chosen { > > > + stdout-path = "serial0:115200n8"; > > > + }; > > > + > > > + cpus { > > > + timebase-frequency = <4000000>; > > > + }; > > > + > > > + memory@40000000 { > > > + device_type = "memory"; > > > + reg = <0x0 0x40000000 0x1 0x0>; > > > > Is this a good idea when you have SKUs with 2, 4 & 8 GiB of DDR? > > The VisionFive 2 board only has 4GB version and 8GB version now. Before > linux startup, we will change this property in dtb through u-boot to > make sure the board can boot up with the correct memory size. Ah I see. Thanks.
On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote: > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; So I think this is wrong, and the stdout-path should be uart3 instead. Per the QSG [0], GPIO5/6 are the suggested UART Tx/Rx to use. This appears to map to uart3 rather than uart0. FWIW, uart3 is also the stdout-path for the v1, see: arch/riscv/boot/dts/starfive/jh7100-common.dtsi At least, that change is what I needed to do in order to use the JH7110_VisionFive2_upstream branch, AFAICT matches what you've got in this series. Thanks, Conor. 0 - https://doc-en.rvspace.org/VisionFive2/PDF/VisionFive2_QSG.pdf
On Tue, Jan 10, 2023 at 05:59:09PM +0000, Conor Dooley wrote: > On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote: > > > + aliases { > > + serial0 = &uart0; > > + }; > > + > > + chosen { > > + stdout-path = "serial0:115200n8"; > > + }; > > So I think this is wrong, and the stdout-path should be uart3 instead. > Per the QSG [0], GPIO5/6 are the suggested UART Tx/Rx to use. > This appears to map to uart3 rather than uart0. > FWIW, uart3 is also the stdout-path for the v1, see: > arch/riscv/boot/dts/starfive/jh7100-common.dtsi > > At least, that change is what I needed to do in order to use the > JH7110_VisionFive2_upstream branch, AFAICT matches what you've got in > this series. I went and re-tried things again today, but with the clk & pinctrl series from the ML instead of that branch. I'd gone and used that branch instead of the patches, as there were some build issues with the pinctrl driver from the patches. I fixed the build issues in the pinctrl driver and now uart0 works. Looking at it again, it makes sense for uart0 to be serial0, given there's pinconf stuff being done in this DT for pins 5 & 6 for uart0. Perhaps by using that branch, I was using some older drivers etc given it seems to mostly contain commits dating from November? I'm still a bit confused about the whole thing, given I tried out a whole load of branches to get something booting with ethernet support that day! Since this seems to work with the fixed pinctrl driver, I don't think you need to change anything here. Apologies for the noise! Conor.
On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: > > From: Emil Renner Berthing <kernel@esmil.dk> > > Add a minimal device tree for StarFive JH7110 VisionFive 2 board > which has version A and version B. Support booting and basic > clock/reset/pinctrl/uart drivers. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > .../jh7110-starfive-visionfive-2-va.dts | 13 ++ > .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ > .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ > 4 files changed, 138 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > index 0ea1bc15ab30..79e925a4a227 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0 > dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > new file mode 100644 > index 000000000000..188d3fddbe88 > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > @@ -0,0 +1,13 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > + */ > + > +/dts-v1/; > +#include "jh7110-starfive-visionfive-2.dtsi" > + > +/ { > + model = "StarFive VisionFive 2 VA"; > + compatible = "starfive,visionfive-2-va", "starfive,jh7110"; > +}; > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > new file mode 100644 > index 000000000000..f75c10536f84 > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > @@ -0,0 +1,13 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > + */ > + > +/dts-v1/; > +#include "jh7110-starfive-visionfive-2.dtsi" > + > +/ { > + model = "StarFive VisionFive 2 VB"; > + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; Hi Hal, I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I still think having these names match what is printed on the silkscreen makes it a lot easier for everybody. Even your own releases calls the boards "v1.2A" and "v1.3B": https://github.com/starfive-tech/VisionFive2/releases/ So I'd suggest model = "StarFive VisionFive 2 v1.3B"; compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; I haven't seen these "VA" and "VB" anywhere else, so if you don't want the version numbers and can promise that there will be no incompatible future revisions of the boards then maybe just drop the "V". Eg. model = "StarFive VisionFive 2 B"; compatible = "starfive,visionfive-2-b", "starfive,jh7110"; /Emil > +}; > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > new file mode 100644 > index 000000000000..c60280b89c73 > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -0,0 +1,111 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > + */ > + > +/dts-v1/; > +#include "jh7110.dtsi" > +#include "jh7110-pinfunc.h" > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + cpus { > + timebase-frequency = <4000000>; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0x0 0x40000000 0x1 0x0>; > + }; > + > + gpio-restart { > + compatible = "gpio-restart"; > + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; > + priority = <224>; > + }; > +}; > + > +&osc { > + clock-frequency = <24000000>; > +}; > + > +&rtc_osc { > + clock-frequency = <32768>; > +}; > + > +&gmac0_rmii_refin { > + clock-frequency = <50000000>; > +}; > + > +&gmac0_rgmii_rxin { > + clock-frequency = <125000000>; > +}; > + > +&gmac1_rmii_refin { > + clock-frequency = <50000000>; > +}; > + > +&gmac1_rgmii_rxin { > + clock-frequency = <125000000>; > +}; > + > +&i2stx_bclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&i2stx_lrck_ext { > + clock-frequency = <192000>; > +}; > + > +&i2srx_bclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&i2srx_lrck_ext { > + clock-frequency = <192000>; > +}; > + > +&tdm_ext { > + clock-frequency = <49152000>; > +}; > + > +&mclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pins>; > + status = "okay"; > +}; > + > +&gpio { > + uart0_pins: uart0-0 { > + tx-pins { > + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, GPOEN_ENABLE, GPI_NONE)>; > + bias-disable; > + drive-strength = <12>; > + input-disable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + > + rx-pins { > + pinmux = <GPIOMUX(6, GPOUT_LOW, GPOEN_DISABLE, GPI_SYS_UART0_RX)>; > + bias-disable; /* external pull-up */ > + drive-strength = <2>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > +}; > -- > 2.38.1 >
On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: >> >> From: Emil Renner Berthing <kernel@esmil.dk> >> >> Add a minimal device tree for StarFive JH7110 VisionFive 2 board >> which has version A and version B. Support booting and basic >> clock/reset/pinctrl/uart drivers. >> >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> >> Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> >> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> >> Co-developed-by: Hal Feng <hal.feng@starfivetech.com> >> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> arch/riscv/boot/dts/starfive/Makefile | 1 + >> .../jh7110-starfive-visionfive-2-va.dts | 13 ++ >> .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ >> .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ >> 4 files changed, 138 insertions(+) >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi >> >> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile >> index 0ea1bc15ab30..79e925a4a227 100644 >> --- a/arch/riscv/boot/dts/starfive/Makefile >> +++ b/arch/riscv/boot/dts/starfive/Makefile >> @@ -1,2 +1,3 @@ >> # SPDX-License-Identifier: GPL-2.0 >> dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts >> new file mode 100644 >> index 000000000000..188d3fddbe88 >> --- /dev/null >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts >> @@ -0,0 +1,13 @@ >> +// SPDX-License-Identifier: GPL-2.0 OR MIT >> +/* >> + * Copyright (C) 2022 StarFive Technology Co., Ltd. >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> >> + */ >> + >> +/dts-v1/; >> +#include "jh7110-starfive-visionfive-2.dtsi" >> + >> +/ { >> + model = "StarFive VisionFive 2 VA"; >> + compatible = "starfive,visionfive-2-va", "starfive,jh7110"; >> +}; >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts >> new file mode 100644 >> index 000000000000..f75c10536f84 >> --- /dev/null >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts >> @@ -0,0 +1,13 @@ >> +// SPDX-License-Identifier: GPL-2.0 OR MIT >> +/* >> + * Copyright (C) 2022 StarFive Technology Co., Ltd. >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> >> + */ >> + >> +/dts-v1/; >> +#include "jh7110-starfive-visionfive-2.dtsi" >> + >> +/ { >> + model = "StarFive VisionFive 2 VB"; >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > Hi Hal, > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I > still think having these names match what is printed on the silkscreen > makes it a lot easier for everybody. Even your own releases calls the > boards "v1.2A" and "v1.3B": > https://github.com/starfive-tech/VisionFive2/releases/ > > So I'd suggest > model = "StarFive VisionFive 2 v1.3B"; > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want > the version numbers and can promise that there will be no incompatible > future revisions of the boards then maybe just drop the "V". Eg. > model = "StarFive VisionFive 2 B"; > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; The version A board has reached the end of life. As far as I know, the version B board will not update also unless there are some important requirements and StarFive decides to update. Furthermore, it's too late to change the compatible as patch 1 was already accepted. Will it be easier to read if I modify it as below? model = "StarFive VisionFive 2 vB"; compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; Best regards, Hal
On Wed, 15 Feb 2023 at 15:04, Hal Feng <hal.feng@starfivetech.com> wrote: > > On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: > > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: > >> > >> From: Emil Renner Berthing <kernel@esmil.dk> > >> > >> Add a minimal device tree for StarFive JH7110 VisionFive 2 board > >> which has version A and version B. Support booting and basic > >> clock/reset/pinctrl/uart drivers. > >> > >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > >> Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com> > >> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> > >> Co-developed-by: Hal Feng <hal.feng@starfivetech.com> > >> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > >> --- > >> arch/riscv/boot/dts/starfive/Makefile | 1 + > >> .../jh7110-starfive-visionfive-2-va.dts | 13 ++ > >> .../jh7110-starfive-visionfive-2-vb.dts | 13 ++ > >> .../jh7110-starfive-visionfive-2.dtsi | 111 ++++++++++++++++++ > >> 4 files changed, 138 insertions(+) > >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > >> > >> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > >> index 0ea1bc15ab30..79e925a4a227 100644 > >> --- a/arch/riscv/boot/dts/starfive/Makefile > >> +++ b/arch/riscv/boot/dts/starfive/Makefile > >> @@ -1,2 +1,3 @@ > >> # SPDX-License-Identifier: GPL-2.0 > >> dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > >> +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb > >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > >> new file mode 100644 > >> index 000000000000..188d3fddbe88 > >> --- /dev/null > >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts > >> @@ -0,0 +1,13 @@ > >> +// SPDX-License-Identifier: GPL-2.0 OR MIT > >> +/* > >> + * Copyright (C) 2022 StarFive Technology Co., Ltd. > >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > >> + */ > >> + > >> +/dts-v1/; > >> +#include "jh7110-starfive-visionfive-2.dtsi" > >> + > >> +/ { > >> + model = "StarFive VisionFive 2 VA"; > >> + compatible = "starfive,visionfive-2-va", "starfive,jh7110"; > >> +}; > >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > >> new file mode 100644 > >> index 000000000000..f75c10536f84 > >> --- /dev/null > >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts > >> @@ -0,0 +1,13 @@ > >> +// SPDX-License-Identifier: GPL-2.0 OR MIT > >> +/* > >> + * Copyright (C) 2022 StarFive Technology Co., Ltd. > >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> > >> + */ > >> + > >> +/dts-v1/; > >> +#include "jh7110-starfive-visionfive-2.dtsi" > >> + > >> +/ { > >> + model = "StarFive VisionFive 2 VB"; > >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > Hi Hal, > > > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" > > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I > > still think having these names match what is printed on the silkscreen > > makes it a lot easier for everybody. Even your own releases calls the > > boards "v1.2A" and "v1.3B": > > https://github.com/starfive-tech/VisionFive2/releases/ > > > > So I'd suggest > > model = "StarFive VisionFive 2 v1.3B"; > > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; > > > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want > > the version numbers and can promise that there will be no incompatible > > future revisions of the boards then maybe just drop the "V". Eg. > > model = "StarFive VisionFive 2 B"; > > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; > > The version A board has reached the end of life. As far as I know, the > version B board will not update also unless there are some important > requirements and StarFive decides to update. Furthermore, it's too late > to change the compatible as patch 1 was already accepted. Will it be > easier to read if I modify it as below? > > model = "StarFive VisionFive 2 vB"; > compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; Oh, that's sad that the kernel will now end up calling the boards something that's used nowhere else, even by StarFive :/ But yeah, I guess vA and vB are a little easier to read. > Best regards, > Hal
On Thu, Feb 16, 2023 at 10:27:17AM +0100, Emil Renner Berthing wrote: > On Wed, 15 Feb 2023 at 15:04, Hal Feng <hal.feng@starfivetech.com> wrote: > > On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: > > > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: > > >> + model = "StarFive VisionFive 2 VB"; > > >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > > > Hi Hal, > > > > > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" > > > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I > > > still think having these names match what is printed on the silkscreen > > > makes it a lot easier for everybody. Even your own releases calls the > > > boards "v1.2A" and "v1.3B": > > > https://github.com/starfive-tech/VisionFive2/releases/ > > > > > > So I'd suggest > > > model = "StarFive VisionFive 2 v1.3B"; > > > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; > > > > > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want > > > the version numbers and can promise that there will be no incompatible > > > future revisions of the boards then maybe just drop the "V". Eg. > > > model = "StarFive VisionFive 2 B"; > > > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; > > > > The version A board has reached the end of life. As far as I know, the > > version B board will not update also unless there are some important > > requirements and StarFive decides to update. Furthermore, it's too late > > to change the compatible as patch 1 was already accepted. Will it be > > easier to read if I modify it as below? > > > > model = "StarFive VisionFive 2 vB"; > > compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > Oh, that's sad that the kernel will now end up calling the boards > something that's used nowhere else, even by StarFive :/ > But yeah, I guess vA and vB are a little easier to read. Nothing has been released with that name so AFAIU we can change it still. If you sort it out today/tomorrow I'll try get it to Arnd before the merge window opens... I might've jumped the gun a bit here, I thought that it'd been changed to what you (Emil) had suggested.
On Thu, Feb 16, 2023 at 09:50:37AM +0000, Conor Dooley wrote: > On Thu, Feb 16, 2023 at 10:27:17AM +0100, Emil Renner Berthing wrote: > > On Wed, 15 Feb 2023 at 15:04, Hal Feng <hal.feng@starfivetech.com> wrote: > > > On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: > > > > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: > > > > >> + model = "StarFive VisionFive 2 VB"; > > > >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > > > > > Hi Hal, > > > > > > > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" > > > > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I > > > > still think having these names match what is printed on the silkscreen > > > > makes it a lot easier for everybody. Even your own releases calls the > > > > boards "v1.2A" and "v1.3B": > > > > https://github.com/starfive-tech/VisionFive2/releases/ > > > > > > > > So I'd suggest > > > > model = "StarFive VisionFive 2 v1.3B"; > > > > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; > > > > > > > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want > > > > the version numbers and can promise that there will be no incompatible > > > > future revisions of the boards then maybe just drop the "V". Eg. > > > > model = "StarFive VisionFive 2 B"; > > > > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; > > > > > > The version A board has reached the end of life. As far as I know, the > > > version B board will not update also unless there are some important > > > requirements and StarFive decides to update. Furthermore, it's too late > > > to change the compatible as patch 1 was already accepted. Will it be > > > easier to read if I modify it as below? > > > > > > model = "StarFive VisionFive 2 vB"; > > > compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > Oh, that's sad that the kernel will now end up calling the boards > > something that's used nowhere else, even by StarFive :/ > > But yeah, I guess vA and vB are a little easier to read. > > Nothing has been released with that name so AFAIU we can change it > still. If you sort it out today/tomorrow I'll try get it to Arnd before > the merge window opens... > > I might've jumped the gun a bit here, I thought that it'd been changed > to what you (Emil) had suggested. ? -- >8 -- From 4d44e8a83716d1caa314f25a95bd21ac8904909e Mon Sep 17 00:00:00 2001 From: Conor Dooley <conor.dooley@microchip.com> Date: Thu, 16 Feb 2023 09:58:22 +0000 Subject: [PATCH] dt-bindings: riscv: correct starfive visionfive 2 compatibles Using "va" and "vb" doesn't match what's written on the board, or the communications from StarFive. Switching to using the silkscreened version number will ease confusion & the risk of another spin of the board containing a "conflicting" version identifier. Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- Documentation/devicetree/bindings/riscv/starfive.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 60c7c03fcdce..cc4d92f0a1bf 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -26,8 +26,8 @@ properties: - items: - enum: - - starfive,visionfive-2-va - - starfive,visionfive-2-vb + - starfive,visionfive-2-v1.2a + - starfive,visionfive-2-v1.3b - const: starfive,jh7110 additionalProperties: true
On Thu, 16 Feb 2023 at 11:09, Conor Dooley <conor.dooley@microchip.com> wrote: > > On Thu, Feb 16, 2023 at 09:50:37AM +0000, Conor Dooley wrote: > > On Thu, Feb 16, 2023 at 10:27:17AM +0100, Emil Renner Berthing wrote: > > > On Wed, 15 Feb 2023 at 15:04, Hal Feng <hal.feng@starfivetech.com> wrote: > > > > On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: > > > > > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: > > > > > > >> + model = "StarFive VisionFive 2 VB"; > > > > >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > > > > > > > Hi Hal, > > > > > > > > > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" > > > > > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I > > > > > still think having these names match what is printed on the silkscreen > > > > > makes it a lot easier for everybody. Even your own releases calls the > > > > > boards "v1.2A" and "v1.3B": > > > > > https://github.com/starfive-tech/VisionFive2/releases/ > > > > > > > > > > So I'd suggest > > > > > model = "StarFive VisionFive 2 v1.3B"; > > > > > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; > > > > > > > > > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want > > > > > the version numbers and can promise that there will be no incompatible > > > > > future revisions of the boards then maybe just drop the "V". Eg. > > > > > model = "StarFive VisionFive 2 B"; > > > > > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; > > > > > > > > The version A board has reached the end of life. As far as I know, the > > > > version B board will not update also unless there are some important > > > > requirements and StarFive decides to update. Furthermore, it's too late > > > > to change the compatible as patch 1 was already accepted. Will it be > > > > easier to read if I modify it as below? > > > > > > > > model = "StarFive VisionFive 2 vB"; > > > > compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; > > > > > > Oh, that's sad that the kernel will now end up calling the boards > > > something that's used nowhere else, even by StarFive :/ > > > But yeah, I guess vA and vB are a little easier to read. > > > > Nothing has been released with that name so AFAIU we can change it > > still. If you sort it out today/tomorrow I'll try get it to Arnd before > > the merge window opens... > > > > I might've jumped the gun a bit here, I thought that it'd been changed > > to what you (Emil) had suggested. No, I'm sorry for being late here. The below definitely looks better to me. Hal, would you be fine with this change? /Emil > > -- >8 -- > From 4d44e8a83716d1caa314f25a95bd21ac8904909e Mon Sep 17 00:00:00 2001 > From: Conor Dooley <conor.dooley@microchip.com> > Date: Thu, 16 Feb 2023 09:58:22 +0000 > Subject: [PATCH] dt-bindings: riscv: correct starfive visionfive 2 compatibles > > Using "va" and "vb" doesn't match what's written on the board, or the > communications from StarFive. > Switching to using the silkscreened version number will ease confusion & > the risk of another spin of the board containing a "conflicting" version > identifier. > > Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board") > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Documentation/devicetree/bindings/riscv/starfive.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml > index 60c7c03fcdce..cc4d92f0a1bf 100644 > --- a/Documentation/devicetree/bindings/riscv/starfive.yaml > +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml > @@ -26,8 +26,8 @@ properties: > > - items: > - enum: > - - starfive,visionfive-2-va > - - starfive,visionfive-2-vb > + - starfive,visionfive-2-v1.2a > + - starfive,visionfive-2-v1.3b > - const: starfive,jh7110 > > additionalProperties: true > -- > 2.39.0 > >
On Thu, 16 Feb 2023 11:32:31 +0100, Emil Renner Berthing wrote: > On Thu, 16 Feb 2023 at 11:09, Conor Dooley <conor.dooley@microchip.com> wrote: >> >> On Thu, Feb 16, 2023 at 09:50:37AM +0000, Conor Dooley wrote: >> > On Thu, Feb 16, 2023 at 10:27:17AM +0100, Emil Renner Berthing wrote: >> > > On Wed, 15 Feb 2023 at 15:04, Hal Feng <hal.feng@starfivetech.com> wrote: >> > > > On 2/14/2023 5:53 PM, Emil Renner Berthing wrote: >> > > > > On Tue, 20 Dec 2022 at 02:12, Hal Feng <hal.feng@starfivetech.com> wrote: >> > >> > > > >> + model = "StarFive VisionFive 2 VB"; >> > > > >> + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; >> > > > > >> > > > > Hi Hal, >> > > > > >> > > > > I just want to double check, is "VisionFive 2 VA" / "visoinfive-2-va" >> > > > > and "VisionFive 2 VB" / "visionfive-2-vb" really what you want? I >> > > > > still think having these names match what is printed on the silkscreen >> > > > > makes it a lot easier for everybody. Even your own releases calls the >> > > > > boards "v1.2A" and "v1.3B": >> > > > > https://github.com/starfive-tech/VisionFive2/releases/ >> > > > > >> > > > > So I'd suggest >> > > > > model = "StarFive VisionFive 2 v1.3B"; >> > > > > compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; >> > > > > >> > > > > I haven't seen these "VA" and "VB" anywhere else, so if you don't want >> > > > > the version numbers and can promise that there will be no incompatible >> > > > > future revisions of the boards then maybe just drop the "V". Eg. >> > > > > model = "StarFive VisionFive 2 B"; >> > > > > compatible = "starfive,visionfive-2-b", "starfive,jh7110"; >> > > > >> > > > The version A board has reached the end of life. As far as I know, the >> > > > version B board will not update also unless there are some important >> > > > requirements and StarFive decides to update. Furthermore, it's too late >> > > > to change the compatible as patch 1 was already accepted. Will it be >> > > > easier to read if I modify it as below? >> > > > >> > > > model = "StarFive VisionFive 2 vB"; >> > > > compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; >> > > >> > > Oh, that's sad that the kernel will now end up calling the boards >> > > something that's used nowhere else, even by StarFive :/ >> > > But yeah, I guess vA and vB are a little easier to read. >> > >> > Nothing has been released with that name so AFAIU we can change it >> > still. If you sort it out today/tomorrow I'll try get it to Arnd before >> > the merge window opens... >> > >> > I might've jumped the gun a bit here, I thought that it'd been changed >> > to what you (Emil) had suggested. > > No, I'm sorry for being late here. The below definitely looks better to me. > > Hal, would you be fine with this change? I'm fine with this. It will be more exact. Thanks. Best regards, Hal > >> >> -- >8 -- >> From 4d44e8a83716d1caa314f25a95bd21ac8904909e Mon Sep 17 00:00:00 2001 >> From: Conor Dooley <conor.dooley@microchip.com> >> Date: Thu, 16 Feb 2023 09:58:22 +0000 >> Subject: [PATCH] dt-bindings: riscv: correct starfive visionfive 2 compatibles >> >> Using "va" and "vb" doesn't match what's written on the board, or the >> communications from StarFive. >> Switching to using the silkscreened version number will ease confusion & >> the risk of another spin of the board containing a "conflicting" version >> identifier. >> >> Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> >> Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board") >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> >> --- >> Documentation/devicetree/bindings/riscv/starfive.yaml | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml >> index 60c7c03fcdce..cc4d92f0a1bf 100644 >> --- a/Documentation/devicetree/bindings/riscv/starfive.yaml >> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml >> @@ -26,8 +26,8 @@ properties: >> >> - items: >> - enum: >> - - starfive,visionfive-2-va >> - - starfive,visionfive-2-vb >> + - starfive,visionfive-2-v1.2a >> + - starfive,visionfive-2-v1.3b >> - const: starfive,jh7110 >> >> additionalProperties: true >> -- >> 2.39.0 >> >>
On Thu, Feb 16, 2023 at 08:27:42PM +0800, Hal Feng wrote: > On Thu, 16 Feb 2023 11:32:31 +0100, Emil Renner Berthing wrote: > > On Thu, 16 Feb 2023 at 11:09, Conor Dooley <conor.dooley@microchip.com> wrote: > > > > No, I'm sorry for being late here. The below definitely looks better to me. > > > > Hal, would you be fine with this change? > > I'm fine with this. It will be more exact. Thanks. I'll convert these both to Acked-by & send this as a real patch then. Thanks! > >> -- >8 -- > >> From 4d44e8a83716d1caa314f25a95bd21ac8904909e Mon Sep 17 00:00:00 2001 > >> From: Conor Dooley <conor.dooley@microchip.com> > >> Date: Thu, 16 Feb 2023 09:58:22 +0000 > >> Subject: [PATCH] dt-bindings: riscv: correct starfive visionfive 2 compatibles > >> > >> Using "va" and "vb" doesn't match what's written on the board, or the > >> communications from StarFive. > >> Switching to using the silkscreened version number will ease confusion & > >> the risk of another spin of the board containing a "conflicting" version > >> identifier. > >> > >> Suggested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > >> Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board") > >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > >> --- > >> Documentation/devicetree/bindings/riscv/starfive.yaml | 4 ++-- > >> 1 file changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml > >> index 60c7c03fcdce..cc4d92f0a1bf 100644 > >> --- a/Documentation/devicetree/bindings/riscv/starfive.yaml > >> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml > >> @@ -26,8 +26,8 @@ properties: > >> > >> - items: > >> - enum: > >> - - starfive,visionfive-2-va > >> - - starfive,visionfive-2-vb > >> + - starfive,visionfive-2-v1.2a > >> + - starfive,visionfive-2-v1.3b > >> - const: starfive,jh7110 > >> > >> additionalProperties: true > >> -- > >> 2.39.0 > >> > >> > >
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 0ea1bc15ab30..79e925a4a227 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-2-va.dtb jh7110-starfive-visionfive-2-vb.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts new file mode 100644 index 000000000000..188d3fddbe88 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-va.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> + */ + +/dts-v1/; +#include "jh7110-starfive-visionfive-2.dtsi" + +/ { + model = "StarFive VisionFive 2 VA"; + compatible = "starfive,visionfive-2-va", "starfive,jh7110"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts new file mode 100644 index 000000000000..f75c10536f84 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-vb.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> + */ + +/dts-v1/; +#include "jh7110-starfive-visionfive-2.dtsi" + +/ { + model = "StarFive VisionFive 2 VB"; + compatible = "starfive,visionfive-2-vb", "starfive,jh7110"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi new file mode 100644 index 000000000000..c60280b89c73 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> + */ + +/dts-v1/; +#include "jh7110.dtsi" +#include "jh7110-pinfunc.h" +#include <dt-bindings/gpio/gpio.h> + +/ { + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + timebase-frequency = <4000000>; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x1 0x0>; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + priority = <224>; + }; +}; + +&osc { + clock-frequency = <24000000>; +}; + +&rtc_osc { + clock-frequency = <32768>; +}; + +&gmac0_rmii_refin { + clock-frequency = <50000000>; +}; + +&gmac0_rgmii_rxin { + clock-frequency = <125000000>; +}; + +&gmac1_rmii_refin { + clock-frequency = <50000000>; +}; + +&gmac1_rgmii_rxin { + clock-frequency = <125000000>; +}; + +&i2stx_bclk_ext { + clock-frequency = <12288000>; +}; + +&i2stx_lrck_ext { + clock-frequency = <192000>; +}; + +&i2srx_bclk_ext { + clock-frequency = <12288000>; +}; + +&i2srx_lrck_ext { + clock-frequency = <192000>; +}; + +&tdm_ext { + clock-frequency = <49152000>; +}; + +&mclk_ext { + clock-frequency = <12288000>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&gpio { + uart0_pins: uart0-0 { + tx-pins { + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, GPOEN_ENABLE, GPI_NONE)>; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pinmux = <GPIOMUX(6, GPOUT_LOW, GPOEN_DISABLE, GPI_SYS_UART0_RX)>; + bias-disable; /* external pull-up */ + drive-strength = <2>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; +};