diff mbox series

dt-bindings: PCI: qcom-ep: Fix PERST register description

Message ID 20221018093115.7537-1-johan+linaro@kernel.org
State New
Headers
Series dt-bindings: PCI: qcom-ep: Fix PERST register description |

Commit Message

Johan Hovold Oct. 18, 2022, 9:31 a.m. UTC 
  The 'qcom,perst-regs' property holds a single phandle array with the
phandle of the TCSR syscon and offsets of the two PERST registers, but
the current schema does not capture this.

Update the binding to describe the single phandle array and its three
elements.

Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 .../devicetree/bindings/pci/qcom,pcie-ep.yaml          | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Krzysztof Kozlowski Oct. 18, 2022, 1:04 p.m. UTC | #1 
On 18/10/2022 05:31, Johan Hovold wrote:
> The 'qcom,perst-regs' property holds a single phandle array with the
> phandle of the TCSR syscon and offsets of the two PERST registers, but
> the current schema does not capture this.
> 
> Update the binding to describe the single phandle array and its three
> elements.
> 
> Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller")

It's not necessarily a fix, the original code was correct, just this one
is better. :)

Anyway:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>  .../devicetree/bindings/pci/qcom,pcie-ep.yaml          | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)


Best regards,
Krzysztof
Johan Hovold Nov. 30, 2022, 7:04 a.m. UTC | #2 
On Tue, Oct 18, 2022 at 11:31:15AM +0200, Johan Hovold wrote:
> The 'qcom,perst-regs' property holds a single phandle array with the
> phandle of the TCSR syscon and offsets of the two PERST registers, but
> the current schema does not capture this.
> 
> Update the binding to describe the single phandle array and its three
> elements.
> 
> Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller")
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>  .../devicetree/bindings/pci/qcom,pcie-ep.yaml          | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> index 977c976ea799..7574291646ad 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> @@ -42,13 +42,13 @@ properties:
>      maxItems: 8
>  
>    qcom,perst-regs:
> -    description: Reference to a syscon representing TCSR followed by the two
> -                 offsets within syscon for Perst enable and Perst separation
> -                 enable registers
> +    description: PERST TCSR registers
>      $ref: "/schemas/types.yaml#/definitions/phandle-array"
>      items:
> -      minItems: 3
> -      maxItems: 3
> +      - items:
> +          - description: phandle of TCSR syscon
> +          - description: offset of PERST Enable register
> +          - description: offset of PERST Separation Enable register
>  
>    interrupts:
>      items:

Lorenzo, it seems this one has not yet been picked up so sending a
reminder.

Johan
Manivannan Sadhasivam Nov. 30, 2022, 6:02 p.m. UTC | #3 
On Tue, Oct 18, 2022 at 11:31:15AM +0200, Johan Hovold wrote:
> The 'qcom,perst-regs' property holds a single phandle array with the
> phandle of the TCSR syscon and offsets of the two PERST registers, but
> the current schema does not capture this.
> 
> Update the binding to describe the single phandle array and its three
> elements.
> 
> Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller")
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>

Acked-by: Manivannan Sadhasivam <mani@kernel.org>

Thanks,
Mani

> ---
>  .../devicetree/bindings/pci/qcom,pcie-ep.yaml          | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> index 977c976ea799..7574291646ad 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> @@ -42,13 +42,13 @@ properties:
>      maxItems: 8
>  
>    qcom,perst-regs:
> -    description: Reference to a syscon representing TCSR followed by the two
> -                 offsets within syscon for Perst enable and Perst separation
> -                 enable registers
> +    description: PERST TCSR registers
>      $ref: "/schemas/types.yaml#/definitions/phandle-array"
>      items:
> -      minItems: 3
> -      maxItems: 3
> +      - items:
> +          - description: phandle of TCSR syscon
> +          - description: offset of PERST Enable register
> +          - description: offset of PERST Separation Enable register
>  
>    interrupts:
>      items:
> -- 
> 2.37.3
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index 977c976ea799..7574291646ad 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
@@ -42,13 +42,13 @@  properties:
     maxItems: 8
 
   qcom,perst-regs:
-    description: Reference to a syscon representing TCSR followed by the two
-                 offsets within syscon for Perst enable and Perst separation
-                 enable registers
+    description: PERST TCSR registers
     $ref: "/schemas/types.yaml#/definitions/phandle-array"
     items:
-      minItems: 3
-      maxItems: 3
+      - items:
+          - description: phandle of TCSR syscon
+          - description: offset of PERST Enable register
+          - description: offset of PERST Separation Enable register
 
   interrupts:
     items: