diff mbox series

[v1,4/9] media: verisilicon: Check AV1 bitstreams bit depth

Message ID 20221219155616.848690-5-benjamin.gaignard@collabora.com
State New
Headers
Series AV1 stateless decoder for RK3588 |

Commit Message

Benjamin Gaignard Dec. 19, 2022, 3:56 p.m. UTC 
  The driver supports 8 and 10 bits bitstreams, make sure to discard
other cases.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 drivers/media/platform/verisilicon/hantro_drv.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Nicolas Dufresne Dec. 19, 2022, 8:38 p.m. UTC | #1 
Le lundi 19 décembre 2022 à 16:56 +0100, Benjamin Gaignard a écrit :
> The driver supports 8 and 10 bits bitstreams, make sure to discard
> other cases.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
>  drivers/media/platform/verisilicon/hantro_drv.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> index 8e93710dcfed..e10fc59634dd 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -282,7 +282,13 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
>  		/* We only support profile 0 */
>  		if (dec_params->profile != 0)
>  			return -EINVAL;
> +	} else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
> +		const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
> +
> +		if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
> +			return -EINVAL;

As you state in the cover letter, should this just be this for now ?


> +		if (sequence->bit_depth != 8)
> +			return -EINVAL;


>  	}
> +
>  	return 0;
>  }
>
Benjamin Gaignard Dec. 20, 2022, 1:02 p.m. UTC | #2 
Le 19/12/2022 à 21:38, Nicolas Dufresne a écrit :
> Le lundi 19 décembre 2022 à 16:56 +0100, Benjamin Gaignard a écrit :
>> The driver supports 8 and 10 bits bitstreams, make sure to discard
>> other cases.
>>
>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
>> ---
>>   drivers/media/platform/verisilicon/hantro_drv.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
>> index 8e93710dcfed..e10fc59634dd 100644
>> --- a/drivers/media/platform/verisilicon/hantro_drv.c
>> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
>> @@ -282,7 +282,13 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
>>   		/* We only support profile 0 */
>>   		if (dec_params->profile != 0)
>>   			return -EINVAL;
>> +	} else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
>> +		const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
>> +
>> +		if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
>> +			return -EINVAL;
> As you state in the cover letter, should this just be this for now ?

The driver can decode 8 or 10 bits bitstreams but will on produce 8bits (NV12_4L4 or NV12)
frames. The hardware is able to truncate 10bits bitstreams to 8 bits output.

>
>
>> +		if (sequence->bit_depth != 8)
>> +			return -EINVAL;
>
>>   	}
>> +
>>   	return 0;
>>   }
>>
Nicolas Dufresne Dec. 21, 2022, 4:16 p.m. UTC | #3 
Le mardi 20 décembre 2022 à 14:02 +0100, Benjamin Gaignard a écrit :
> Le 19/12/2022 à 21:38, Nicolas Dufresne a écrit :
> > Le lundi 19 décembre 2022 à 16:56 +0100, Benjamin Gaignard a écrit :
> > > The driver supports 8 and 10 bits bitstreams, make sure to discard
> > > other cases.
> > > 
> > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> > > ---
> > >   drivers/media/platform/verisilicon/hantro_drv.c | 6 ++++++
> > >   1 file changed, 6 insertions(+)
> > > 
> > > diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> > > index 8e93710dcfed..e10fc59634dd 100644
> > > --- a/drivers/media/platform/verisilicon/hantro_drv.c
> > > +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> > > @@ -282,7 +282,13 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> > >   		/* We only support profile 0 */
> > >   		if (dec_params->profile != 0)
> > >   			return -EINVAL;
> > > +	} else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
> > > +		const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
> > > +
> > > +		if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
> > > +			return -EINVAL;
> > As you state in the cover letter, should this just be this for now ?
> 
> The driver can decode 8 or 10 bits bitstreams but will on produce 8bits (NV12_4L4 or NV12)
> frames. The hardware is able to truncate 10bits bitstreams to 8 bits output.

I tested that, and NV12 works, picking NV12_4L4 though leads to corrupted
buffers. I think the PP is not being activated. G2/VC8000 and likely VC9000 can
only produce tile reference in the original depth chosen (hence why it goes not
have a format register like G1 does).

As you are aware, the driver didn't pick NV12_10LE40_4L4 automatically, and
that's what broke fluster 10bit test in tiled mode for 10bit. I suspect in v2,
we'll have all this fixed and 10bit will be activated, so this comment will be
ignored.

> 
> > 
> > 
> > > +		if (sequence->bit_depth != 8)
> > > +			return -EINVAL;
> > 
> > >   	}
> > > +
> > >   	return 0;
> > >   }
> > >
diff mbox series

Patch

diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index 8e93710dcfed..e10fc59634dd 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -282,7 +282,13 @@  static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
 		/* We only support profile 0 */
 		if (dec_params->profile != 0)
 			return -EINVAL;
+	} else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) {
+		const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence;
+
+		if (sequence->bit_depth != 8 && sequence->bit_depth != 10)
+			return -EINVAL;
 	}
+
 	return 0;
 }