Message ID | 20221103-upstream-goodix-reset-v3-6-0975809eb183@theobroma-systems.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w10-20020a170902e88a00b00188dba5d7dbsi16069765plg.78.2022.12.05.05.45.26; Mon, 05 Dec 2022 05:45:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230138AbiLENml (ORCPT <rfc822;jaysivo@gmail.com> + 99 others); Mon, 5 Dec 2022 08:42:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232234AbiLENmf (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 5 Dec 2022 08:42:35 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAC191D0F8; Mon, 5 Dec 2022 05:42:31 -0800 (PST) Received: (Authenticated sender: foss@0leil.net) by mail.gandi.net (Postfix) with ESMTPSA id B22AFFF815; Mon, 5 Dec 2022 13:42:07 +0000 (UTC) From: Quentin Schulz <foss+kernel@0leil.net> To: Samuel Holland <samuel@sholland.org>, Bastien Nocera <hadess@hadess.net>, =?utf-8?q?Guido_G=C3=BCnther?= <agx@sigxcpu.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Angus Ainslie <angus@akkea.ca>, Ondrej Jirman <megous@megous.com>, Icenowy Zheng <icenowy@aosc.io>, Andy Gross <agross@kernel.org>, Aleksei Mamlin <mamlinav@gmail.com>, Fabio Estevam <festevam@gmail.com>, David Jander <david@protonic.nl>, Frieder Schrempf <frieder.schrempf@kontron.de>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Peter Geis <pgwipeout@gmail.com>, Heiko Stuebner <heiko@sntech.de>, Shawn Guo <shawnguo@kernel.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Lukasz Majewski <lukma@denx.de>, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>, Chen-Yu Tsai <wens@csie.org>, Michael Riesch <michael.riesch@wolfvision.net>, Rob Herring <robh+dt@kernel.org>, NXP Linux Team <linux-imx@nxp.com>, Dmitry Torokhov <dmitry.torokhov@gmail.com>, Hans de Goede <hdegoede@redhat.com>, Jagan Teki <jagan@amarulasolutions.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Quentin Schulz <quentin.schulz@theobroma-systems.com>, linux-input@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 6/9] arm64: dts: allwinner: fix touchscreen reset GPIO polarity Date: Mon, 5 Dec 2022 14:40:35 +0100 Message-Id: <20221103-upstream-goodix-reset-v3-6-0975809eb183@theobroma-systems.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221103-upstream-goodix-reset-v3-0-0975809eb183@theobroma-systems.com> References: <20221103-upstream-goodix-reset-v3-0-0975809eb183@theobroma-systems.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.10.1 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751381905215134497?= X-GMAIL-MSGID: =?utf-8?q?1751381905215134497?= |
Series |
fix reset line polarity for Goodix touchscreen controllers
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Commit Message
Quentin Schulz
Dec. 5, 2022, 1:40 p.m. UTC
From: Quentin Schulz <quentin.schulz@theobroma-systems.com> The reset line is active low for the Goodix touchscreen controller so let's fix the polarity in the Device Tree node. Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 2 +- arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
Comments
Hi Quentin, On 12/5/22 07:40, Quentin Schulz wrote: > From: Quentin Schulz <quentin.schulz@theobroma-systems.com> > > The reset line is active low for the Goodix touchscreen controller so > let's fix the polarity in the Device Tree node. > > Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts | 2 +- > arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +- > arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 2 +- > arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts | 2 +- > 4 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts > index 8233582f62881..5fd581037d987 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts > @@ -122,7 +122,7 @@ touchscreen@5d { > interrupt-parent = <&pio>; > interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; > irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ > - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */ > + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* CTP-RST: PH8 */ You are changing the DT binding here, in a way that breaks backward compatibility with existing devicetrees. NACK. Regards, Samuel > touchscreen-inverted-x; > touchscreen-inverted-y; > }; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts > index 577f9e1d08a14..990f042f5a5b1 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts > @@ -45,7 +45,7 @@ touchscreen@5d { > interrupt-parent = <&pio>; > interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; > irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ > - reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH11 */ > + reset-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* CTP-RST: PH11 */ > touchscreen-inverted-x; > touchscreen-inverted-y; > }; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi > index 87847116ab6d9..97359cc7f13e2 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi > @@ -167,7 +167,7 @@ touchscreen@5d { > interrupt-parent = <&pio>; > interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ > irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ > - reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ > + reset-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */ > AVDD28-supply = <®_ldo_io0>; > VDDIO-supply = <®_ldo_io0>; > touchscreen-size-x = <720>; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts > index 0a5607f73049e..c0eccc753e3f5 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts > @@ -189,7 +189,7 @@ touchscreen@5d { > interrupt-parent = <&pio>; > interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ > irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ > - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ > + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ > AVDD28-supply = <®_ldo_io1>; > }; > }; >
Hi Samuel, On 12/6/22 01:26, Samuel Holland wrote: > Hi Quentin, > > On 12/5/22 07:40, Quentin Schulz wrote: >> From: Quentin Schulz <quentin.schulz@theobroma-systems.com> >> >> The reset line is active low for the Goodix touchscreen controller so >> let's fix the polarity in the Device Tree node. >> >> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> >> --- >> arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts | 2 +- >> arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +- >> arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 2 +- >> arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts | 2 +- >> 4 files changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >> index 8233582f62881..5fd581037d987 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >> @@ -122,7 +122,7 @@ touchscreen@5d { >> interrupt-parent = <&pio>; >> interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; >> irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ >> - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */ >> + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* CTP-RST: PH8 */ > > You are changing the DT binding here, in a way that breaks backward > compatibility with existing devicetrees. NACK. > Yes. Some boards will get their DT binding broken, there's no way around it sadly. We know already that the PRT8MM DT binding was written with a different understanding than for other boards. There are some board schematics I don't have access to so maybe the same applies to those. A reminder that even if you got your polarity wrong, it could still work in some cases (timings right today but nothing guaranteed it'll stay this way forever). with the current driver, what I assume we should get for an "incorrect" polarity (with GPIO_ACTIVE_LOW) is: ___________________ INT _______| |___________ ____________ __________________ RST |_________| ^ L__ pull-up on RST so high by default ^ L___ gpiod_direction_output(0) (deassert GPIO active-low, so high) ^ L____ goodix_irq_direction_output ^ L___ gpiod_direction_output(1) (assert GPIO active-low, so low) ^ L____ gpiod_direction_input() (floating, pull-up on RST so high) This works because of the pull-up on RST and that what matters is that the INT lane is configured 100µs before a rising edge on RST line (for at least 5ms). However, the init sequence is not properly followed and might get broken in the future since it is not something that we explicitly support. With the proposed patch: ___________________ INT _______| |___________ ____ __________________ RST |_______| ^ L__ pull-up on RST so high by default ^ L___ gpiod_direction_output(1) (assert GPIO active-low, so low) ^ L____ goodix_irq_direction_output ^ L___ gpiod_direction_output(1) (deassert GPIO active-low, so high) ^ L____ gpiod_direction_input() (floating, pull-up on RST so high) This should work too and does not rely on some side effects/timings and should be future-proof. The other option would be to only fix known "broken" boards (e.g. PRT8MM, maybe others) and specify in the DT binding documentation that the reset-gpios polarity is "inverted" (that is, the reset is asserted when the reset-gpios as specified in the DT is deasserted). This makes the DT binding documentation **implementation specific** which is everything the DT binding is trying to avoid. Something needs to be done, and no solution will make everyone happy. Cheers, Quentin
Hi Quentin, On 12/6/22 05:11, Quentin Schulz wrote: > On 12/6/22 01:26, Samuel Holland wrote: >> On 12/5/22 07:40, Quentin Schulz wrote: >>> From: Quentin Schulz <quentin.schulz@theobroma-systems.com> >>> >>> The reset line is active low for the Goodix touchscreen controller so >>> let's fix the polarity in the Device Tree node. >>> >>> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> >>> --- >>> arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts | >>> 2 +- >>> arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | >>> 2 +- >>> arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | >>> 2 +- >>> arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts | >>> 2 +- >>> 4 files changed, 4 insertions(+), 4 deletions(-) >>> >>> diff --git >>> a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>> b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>> index 8233582f62881..5fd581037d987 100644 >>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>> @@ -122,7 +122,7 @@ touchscreen@5d { >>> interrupt-parent = <&pio>; >>> interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; >>> irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ >>> - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: >>> PH8 */ >>> + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* CTP-RST: PH8 */ >> >> You are changing the DT binding here, in a way that breaks backward >> compatibility with existing devicetrees. NACK. >> > > Yes. > > Some boards will get their DT binding broken, there's no way around it > sadly. > > We know already that the PRT8MM DT binding was written with a different > understanding than for other boards. There are some board schematics I > don't have access to so maybe the same applies to those. > > A reminder that even if you got your polarity wrong, it could still work > in some cases (timings right today but nothing guaranteed it'll stay > this way forever). > > with the current driver, what I assume we should get for an "incorrect" > polarity (with GPIO_ACTIVE_LOW) is: > ___________________ > INT _______| |___________ > > ____________ __________________ > RST |_________| > > ^ > L__ pull-up on RST so high by default > ^ > L___ gpiod_direction_output(0) (deassert GPIO active-low, so high) > ^ > L____ goodix_irq_direction_output > ^ > L___ gpiod_direction_output(1) (assert GPIO active-low, > so low) > ^ > L____ gpiod_direction_input() (floating, > pull-up on RST so high) > > This works because of the pull-up on RST and that what matters is that > the INT lane is configured 100µs before a rising edge on RST line (for > at least 5ms). However, the init sequence is not properly followed and > might get broken in the future since it is not something that we > explicitly support. We as platform DT/binding maintainers explicitly support compatibility with existing devicetrees, whether those devicetrees are "correct" or not. If a new version of Linux does not work with an old DT, that is a regression in Linux. > With the proposed patch: > ___________________ > INT _______| |___________ > > ____ __________________ > RST |_______| > > ^ > L__ pull-up on RST so high by default > ^ > L___ gpiod_direction_output(1) (assert GPIO active-low, so low) > ^ > L____ goodix_irq_direction_output > ^ > L___ gpiod_direction_output(1) (deassert GPIO > active-low, so high) > ^ > L____ gpiod_direction_input() (floating, > pull-up on RST so high) > > This should work too and does not rely on some side effects/timings and > should be future-proof. Thanks for the explanation. So the reset sequence happens to work with either GPIO polarity because the pin is set to high impedance before and afterward. I tested this patch (no driver changes) on a PinePhone, and indeed Linux's touchscreen driver still loads and works fine. > The other option would be to only fix known "broken" boards (e.g. > PRT8MM, maybe others) and specify in the DT binding documentation that > the reset-gpios polarity is "inverted" (that is, the reset is asserted > when the reset-gpios as specified in the DT is deasserted). This makes > the DT binding documentation **implementation specific** which is > everything the DT binding is trying to avoid. Not really, the binding just encodes existing practice. New boards must invert the polarity relative to the datasheet because existing boards did the same thing previously. The board devicetrees drive the binding; Linux is only a consumer of it. So the binding is still not Linux-specific. In fact, here you rely on the "implementation specific" behavior of the Linux driver to claim that this a non-breaking change. If some other DT consumer has a driver which leaves the reset line as an output, this patch would be a breaking change for them. And it turns out that such a driver exists: https://github.com/zephyrproject-rtos/zephyr/commit/17089a2e14acb0428502 https://github.com/zephyrproject-rtos/zephyr/pull/48927 > Something needs to be done, and no solution will make everyone happy. I am happy as long as the change does not create any DT compatibility issues, either between OSes or between OS versions. You demonstrated that Linux was fine, and the BSDs don't have appear to have a driver for this hardware. So from an Allwinner platform perspective, I am fine with this patch. But you should ensure the Zephyr folks are okay with making the same change to their driver and devicetrees, since it is a breaking change for them. Regards, Samuel
On 2022-12-12 06:32, Samuel Holland wrote: > Hi Quentin, > > On 12/6/22 05:11, Quentin Schulz wrote: >> On 12/6/22 01:26, Samuel Holland wrote: >>> On 12/5/22 07:40, Quentin Schulz wrote: >>>> From: Quentin Schulz <quentin.schulz@theobroma-systems.com> >>>> >>>> The reset line is active low for the Goodix touchscreen controller so >>>> let's fix the polarity in the Device Tree node. >>>> >>>> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> >>>> --- >>>> arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts | >>>> 2 +- >>>> arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | >>>> 2 +- >>>> arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | >>>> 2 +- >>>> arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts | >>>> 2 +- >>>> 4 files changed, 4 insertions(+), 4 deletions(-) >>>> >>>> diff --git >>>> a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>>> b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>>> index 8233582f62881..5fd581037d987 100644 >>>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts >>>> @@ -122,7 +122,7 @@ touchscreen@5d { >>>> interrupt-parent = <&pio>; >>>> interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; >>>> irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ >>>> - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: >>>> PH8 */ >>>> + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* CTP-RST: PH8 */ >>> >>> You are changing the DT binding here, in a way that breaks backward >>> compatibility with existing devicetrees. NACK. >>> >> >> Yes. >> >> Some boards will get their DT binding broken, there's no way around it >> sadly. >> >> We know already that the PRT8MM DT binding was written with a different >> understanding than for other boards. There are some board schematics I >> don't have access to so maybe the same applies to those. >> >> A reminder that even if you got your polarity wrong, it could still work >> in some cases (timings right today but nothing guaranteed it'll stay >> this way forever). >> >> with the current driver, what I assume we should get for an "incorrect" >> polarity (with GPIO_ACTIVE_LOW) is: >> ___________________ >> INT _______| |___________ >> >> ____________ __________________ >> RST |_________| >> >> ^ >> L__ pull-up on RST so high by default >> ^ >> L___ gpiod_direction_output(0) (deassert GPIO active-low, so high) >> ^ >> L____ goodix_irq_direction_output >> ^ >> L___ gpiod_direction_output(1) (assert GPIO active-low, >> so low) >> ^ >> L____ gpiod_direction_input() (floating, >> pull-up on RST so high) >> >> This works because of the pull-up on RST and that what matters is that >> the INT lane is configured 100µs before a rising edge on RST line (for >> at least 5ms). However, the init sequence is not properly followed and >> might get broken in the future since it is not something that we >> explicitly support. > > We as platform DT/binding maintainers explicitly support compatibility > with existing devicetrees, whether those devicetrees are "correct" or > not. If a new version of Linux does not work with an old DT, that is a > regression in Linux. > >> With the proposed patch: >> ___________________ >> INT _______| |___________ >> >> ____ __________________ >> RST |_______| >> >> ^ >> L__ pull-up on RST so high by default >> ^ >> L___ gpiod_direction_output(1) (assert GPIO active-low, so low) >> ^ >> L____ goodix_irq_direction_output >> ^ >> L___ gpiod_direction_output(1) (deassert GPIO >> active-low, so high) >> ^ >> L____ gpiod_direction_input() (floating, >> pull-up on RST so high) >> >> This should work too and does not rely on some side effects/timings and >> should be future-proof. > > Thanks for the explanation. So the reset sequence happens to work with > either GPIO polarity because the pin is set to high impedance before and > afterward. I tested this patch (no driver changes) on a PinePhone, and > indeed Linux's touchscreen driver still loads and works fine. > >> The other option would be to only fix known "broken" boards (e.g. >> PRT8MM, maybe others) and specify in the DT binding documentation that >> the reset-gpios polarity is "inverted" (that is, the reset is asserted >> when the reset-gpios as specified in the DT is deasserted). This makes >> the DT binding documentation **implementation specific** which is >> everything the DT binding is trying to avoid. > > Not really, the binding just encodes existing practice. New boards must > invert the polarity relative to the datasheet because existing boards > did the same thing previously. The board devicetrees drive the binding; > Linux is only a consumer of it. So the binding is still not Linux-specific. No, the whole point of a binding is to define a contract between producers and consumers. It is a specification, not a consensus. (I see up-thread there was some use of "binding" to refer to DTS producers, so maybe there's a bit of confusion in play here) The goodix.yaml binding does not state that any polarity flag in the "reset-gpios" specifier should be ignored, therefore consumers are objectively wrong to ignore it, and producers are objectively wrong to specify a polarity that does not represent the underlying hardware. > In fact, here you rely on the "implementation specific" behavior of the > Linux driver to claim that this a non-breaking change. If some other DT > consumer has a driver which leaves the reset line as an output, this > patch would be a breaking change for them. And it turns out that such a > driver exists: As discussed previously, there are already established DTBs in use that *correctly* specify both active-low and active-high (hardware-inverted) polarities here, so that would mean Zephyr is already broken in general. However, since it looks like they've chosen to maintain their own project-specific bindings and DTS files, if they do also have the equivalent bug then it would seem to be entirely in their own hands. Thanks, Robin. > https://github.com/zephyrproject-rtos/zephyr/commit/17089a2e14acb0428502 > https://github.com/zephyrproject-rtos/zephyr/pull/48927 > >> Something needs to be done, and no solution will make everyone happy. > > I am happy as long as the change does not create any DT compatibility > issues, either between OSes or between OS versions. You demonstrated > that Linux was fine, and the BSDs don't have appear to have a driver for > this hardware. So from an Allwinner platform perspective, I am fine with > this patch. > > But you should ensure the Zephyr folks are okay with making the same > change to their driver and devicetrees, since it is a breaking change > for them. > > Regards, > Samuel > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts index 8233582f62881..5fd581037d987 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts @@ -122,7 +122,7 @@ touchscreen@5d { interrupt-parent = <&pio>; interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */ + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* CTP-RST: PH8 */ touchscreen-inverted-x; touchscreen-inverted-y; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts index 577f9e1d08a14..990f042f5a5b1 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts @@ -45,7 +45,7 @@ touchscreen@5d { interrupt-parent = <&pio>; interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>; irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */ - reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH11 */ + reset-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* CTP-RST: PH11 */ touchscreen-inverted-x; touchscreen-inverted-y; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi index 87847116ab6d9..97359cc7f13e2 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi @@ -167,7 +167,7 @@ touchscreen@5d { interrupt-parent = <&pio>; interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ + reset-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */ AVDD28-supply = <®_ldo_io0>; VDDIO-supply = <®_ldo_io0>; touchscreen-size-x = <720>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts index 0a5607f73049e..c0eccc753e3f5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts @@ -189,7 +189,7 @@ touchscreen@5d { interrupt-parent = <&pio>; interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ AVDD28-supply = <®_ldo_io1>; }; };