Message ID | 20221207220012.16529-12-quic_bjorande@quicinc.com |
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State | New |
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Wed, 07 Dec 2022 22:00:26 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B7M0QbL028050 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 7 Dec 2022 22:00:26 GMT Received: from th-lint-050.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 7 Dec 2022 14:00:25 -0800 From: Bjorn Andersson <quic_bjorande@quicinc.com> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> CC: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Kalyan Thota <quic_kalyant@quicinc.com>, Jessica Zhang <quic_jesszhan@quicinc.com>, "Kuogee Hsieh" <quic_khsieh@quicinc.com>, Johan Hovold <johan+linaro@kernel.org>, Sankeerth Billakanti <quic_sbillaka@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <dri-devel@lists.freedesktop.org>, <freedreno@lists.freedesktop.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v5 11/12] arm64: dts: qcom: sc8280xp-crd: Enable EDP Date: Wed, 7 Dec 2022 14:00:11 -0800 Message-ID: <20221207220012.16529-12-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221207220012.16529-1-quic_bjorande@quicinc.com> References: <20221207220012.16529-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: fZ1TDETdHb-wGyPOtw7lqPkKxS-IHSGI X-Proofpoint-ORIG-GUID: fZ1TDETdHb-wGyPOtw7lqPkKxS-IHSGI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-07_11,2022-12-07_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 adultscore=0 malwarescore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212070186 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751594403561459403?= X-GMAIL-MSGID: =?utf-8?q?1751594403561459403?= |
Series |
drm/msm: Add SC8280XP support
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Commit Message
Bjorn Andersson
Dec. 7, 2022, 10 p.m. UTC
From: Bjorn Andersson <bjorn.andersson@linaro.org> The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes and link it together with the backlight control. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- Changes since v4: - None arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 72 ++++++++++++++++++++++- 1 file changed, 71 insertions(+), 1 deletion(-)
Comments
On Wed, Dec 07, 2022 at 02:00:11PM -0800, Bjorn Andersson wrote: > From: Bjorn Andersson <bjorn.andersson@linaro.org> > > The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes > and link it together with the backlight control. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > > Changes since v4: > - None > > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 72 ++++++++++++++++++++++- > 1 file changed, 71 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > index f09810e3d956..a7d2384cbbe8 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > @@ -20,7 +20,7 @@ aliases { > serial0 = &qup2_uart17; > }; > > - backlight { > + backlight: backlight { > compatible = "pwm-backlight"; > pwms = <&pmc8280c_lpg 3 1000000>; > enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>; > @@ -34,6 +34,22 @@ chosen { > stdout-path = "serial0:115200n8"; > }; > > + vreg_edp_3p3: regulator-edp-3p3 { > + compatible = "regulator-fixed"; > + > + regulator-name = "VREG_EDP_3P3"; Please use the net name from the schematics here (i.e. "VCC3LCD"). > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&edp_reg_en>; > + > + regulator-boot-on; > + }; > + > vreg_edp_bl: regulator-edp-bl { > compatible = "regulator-fixed"; > > @@ -230,6 +246,54 @@ vreg_l9d: ldo9 { > }; > }; > > +&dispcc0 { > + status = "okay"; > +}; > + > +&mdss0 { > + status = "okay"; > +}; > + > +&mdss0_dp3 { > + compatible = "qcom,sc8280xp-edp"; > + status = "okay"; Please move the status property last (i.e. after data-lanes). > + > + data-lanes = <0 1 2 3>; > + > + aux-bus { > + panel { > + compatible = "edp-panel"; > + power-supply = <&vreg_edp_3p3>; > + > + backlight = <&backlight>; > + > + ports { > + port { > + edp_panel_in: endpoint { > + remote-endpoint = <&mdss0_dp3_out>; > + }; > + }; > + }; > + }; > + }; > + > + ports { > + port@1 { > + reg = <1>; > + mdss0_dp3_out: endpoint { > + remote-endpoint = <&edp_panel_in>; > + }; > + }; > + }; > +}; > + > +&mdss0_dp3_phy { > + status = "okay"; Same here. > + > + vdda-phy-supply = <&vreg_l6b>; > + vdda-pll-supply = <&vreg_l3b>; > +}; > + > &pcie2a { > perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; > wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; > @@ -496,6 +560,12 @@ hastings_reg_en: hastings-reg-en-state { > &tlmm { > gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; > > + edp_reg_en: edp-reg-en-state { > + pins = "gpio25"; > + function = "gpio"; > + output-enable; 'output-enable' is not valid for tlmm and causes the settings to be rejected: sc8280xp-tlmm f100000.pinctrl: pin_config_group_set op failed for group 25 reg-fixed-voltage regulator-edp-3p3: Error applying setting, reverse things back > + }; > + > kybd_default: kybd-default-state { > disable-pins { > pins = "gpio102"; Johan
On Thu, 8 Dec 2022 at 00:00, Bjorn Andersson <quic_bjorande@quicinc.com> wrote: > > From: Bjorn Andersson <bjorn.andersson@linaro.org> > > The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes > and link it together with the backlight control. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > > Changes since v4: > - None > > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 72 ++++++++++++++++++++++- > 1 file changed, 71 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > index f09810e3d956..a7d2384cbbe8 100644 [skipped] > @@ -230,6 +246,54 @@ vreg_l9d: ldo9 { > }; > }; > > +&dispcc0 { > + status = "okay"; > +}; > + > +&mdss0 { > + status = "okay"; > +}; > + > +&mdss0_dp3 { > + compatible = "qcom,sc8280xp-edp"; > + status = "okay"; > + > + data-lanes = <0 1 2 3>; I hope to land Kuogee patches that move data-lanes to the endpoint node, where they belong. Do we have any good way to proceed here? Or would it be easier to land this patch as is and then, maybe next cycle, move the property? > + > + aux-bus { > + panel { > + compatible = "edp-panel"; > + power-supply = <&vreg_edp_3p3>; > + > + backlight = <&backlight>; > + > + ports { > + port { > + edp_panel_in: endpoint { > + remote-endpoint = <&mdss0_dp3_out>; > + }; > + }; > + }; > + }; > + }; > + > + ports { > + port@1 { > + reg = <1>; > + mdss0_dp3_out: endpoint { > + remote-endpoint = <&edp_panel_in>; > + }; > + }; > + }; > +}; > + > +&mdss0_dp3_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l6b>; > + vdda-pll-supply = <&vreg_l3b>; > +}; > + > &pcie2a { > perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; > wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; > @@ -496,6 +560,12 @@ hastings_reg_en: hastings-reg-en-state { > &tlmm { > gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; > > + edp_reg_en: edp-reg-en-state { > + pins = "gpio25"; > + function = "gpio"; > + output-enable; > + }; > + > kybd_default: kybd-default-state { > disable-pins { > pins = "gpio102"; > -- > 2.37.3 >
On Fri, Dec 09, 2022 at 11:35:23AM +0100, Johan Hovold wrote: > On Wed, Dec 07, 2022 at 02:00:11PM -0800, Bjorn Andersson wrote: > > From: Bjorn Andersson <bjorn.andersson@linaro.org> > > > > The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes > > and link it together with the backlight control. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > > --- > > > > Changes since v4: > > - None > > > > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 72 ++++++++++++++++++++++- > > 1 file changed, 71 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > > index f09810e3d956..a7d2384cbbe8 100644 > > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > > @@ -20,7 +20,7 @@ aliases { > > serial0 = &qup2_uart17; > > }; > > > > - backlight { > > + backlight: backlight { > > compatible = "pwm-backlight"; > > pwms = <&pmc8280c_lpg 3 1000000>; > > enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>; > > @@ -34,6 +34,22 @@ chosen { > > stdout-path = "serial0:115200n8"; > > }; > > > > + vreg_edp_3p3: regulator-edp-3p3 { > > + compatible = "regulator-fixed"; > > + > > + regulator-name = "VREG_EDP_3P3"; > > Please use the net name from the schematics here (i.e. "VCC3LCD"). > This is the name used in the CRD schematics. > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + > > + gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; > > + enable-active-high; > > + > > + pinctrl-names = "default"; > > + pinctrl-0 = <&edp_reg_en>; > > + > > + regulator-boot-on; > > + }; > > + > > vreg_edp_bl: regulator-edp-bl { > > compatible = "regulator-fixed"; > > > > @@ -230,6 +246,54 @@ vreg_l9d: ldo9 { > > }; > > }; > > > > +&dispcc0 { > > + status = "okay"; > > +}; > > + > > +&mdss0 { > > + status = "okay"; > > +}; > > + > > +&mdss0_dp3 { > > + compatible = "qcom,sc8280xp-edp"; > > + status = "okay"; > > Please move the status property last (i.e. after data-lanes). > Sorry for missing that. > > + > > + data-lanes = <0 1 2 3>; > > + > > + aux-bus { > > + panel { > > + compatible = "edp-panel"; > > + power-supply = <&vreg_edp_3p3>; > > + > > + backlight = <&backlight>; > > + > > + ports { > > + port { > > + edp_panel_in: endpoint { > > + remote-endpoint = <&mdss0_dp3_out>; > > + }; > > + }; > > + }; > > + }; > > + }; > > + > > + ports { > > + port@1 { > > + reg = <1>; > > + mdss0_dp3_out: endpoint { > > + remote-endpoint = <&edp_panel_in>; > > + }; > > + }; > > + }; > > +}; > > + > > +&mdss0_dp3_phy { > > + status = "okay"; > > Same here. > Ditto. > > + > > + vdda-phy-supply = <&vreg_l6b>; > > + vdda-pll-supply = <&vreg_l3b>; > > +}; > > + > > &pcie2a { > > perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; > > wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; > > @@ -496,6 +560,12 @@ hastings_reg_en: hastings-reg-en-state { > > &tlmm { > > gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; > > > > + edp_reg_en: edp-reg-en-state { > > + pins = "gpio25"; > > + function = "gpio"; > > + output-enable; > > 'output-enable' is not valid for tlmm and causes the settings to be > rejected: > > sc8280xp-tlmm f100000.pinctrl: pin_config_group_set op failed for group 25 > reg-fixed-voltage regulator-edp-3p3: Error applying setting, reverse things back > Thanks for spotting that, it doesn't seem to be needed for the gpio-regulator driver anyways... Regards, Bjorn > > + }; > > + > > kybd_default: kybd-default-state { > > disable-pins { > > pins = "gpio102"; > > Johan
On Tue, Dec 13, 2022 at 07:10:14AM -0800, Bjorn Andersson wrote: > On Fri, Dec 09, 2022 at 11:35:23AM +0100, Johan Hovold wrote: > > > + edp_reg_en: edp-reg-en-state { > > > + pins = "gpio25"; > > > + function = "gpio"; > > > + output-enable; > > > > 'output-enable' is not valid for tlmm and causes the settings to be > > rejected: > > > > sc8280xp-tlmm f100000.pinctrl: pin_config_group_set op failed for group 25 > > reg-fixed-voltage regulator-edp-3p3: Error applying setting, reverse things back > > > > Thanks for spotting that, it doesn't seem to be needed for the gpio-regulator > driver anyways... I noticed that the firmware on both CRD and X13s sets the drive strength to 16 here. Should we specify that too (and disable the pull up) instead of relying on the firmware configuration? Johan
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index f09810e3d956..a7d2384cbbe8 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -20,7 +20,7 @@ aliases { serial0 = &qup2_uart17; }; - backlight { + backlight: backlight { compatible = "pwm-backlight"; pwms = <&pmc8280c_lpg 3 1000000>; enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>; @@ -34,6 +34,22 @@ chosen { stdout-path = "serial0:115200n8"; }; + vreg_edp_3p3: regulator-edp-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_EDP_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&edp_reg_en>; + + regulator-boot-on; + }; + vreg_edp_bl: regulator-edp-bl { compatible = "regulator-fixed"; @@ -230,6 +246,54 @@ vreg_l9d: ldo9 { }; }; +&dispcc0 { + status = "okay"; +}; + +&mdss0 { + status = "okay"; +}; + +&mdss0_dp3 { + compatible = "qcom,sc8280xp-edp"; + status = "okay"; + + data-lanes = <0 1 2 3>; + + aux-bus { + panel { + compatible = "edp-panel"; + power-supply = <&vreg_edp_3p3>; + + backlight = <&backlight>; + + ports { + port { + edp_panel_in: endpoint { + remote-endpoint = <&mdss0_dp3_out>; + }; + }; + }; + }; + }; + + ports { + port@1 { + reg = <1>; + mdss0_dp3_out: endpoint { + remote-endpoint = <&edp_panel_in>; + }; + }; + }; +}; + +&mdss0_dp3_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l6b>; + vdda-pll-supply = <&vreg_l3b>; +}; + &pcie2a { perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; @@ -496,6 +560,12 @@ hastings_reg_en: hastings-reg-en-state { &tlmm { gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; + edp_reg_en: edp-reg-en-state { + pins = "gpio25"; + function = "gpio"; + output-enable; + }; + kybd_default: kybd-default-state { disable-pins { pins = "gpio102";