Message ID | 20221016150110.3020451-2-lis8215@gmail.com |
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State | New |
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[37.212.7.39]) by smtp.gmail.com with ESMTPSA id u8-20020a17090657c800b0078c1e174e11sm4645699ejr.136.2022.10.16.08.03.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Oct 2022 08:03:09 -0700 (PDT) From: Siarhei Volkau <lis8215@gmail.com> Cc: Siarhei Volkau <lis8215@gmail.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Cercueil <paul@crapouillou.net>, Thomas Bogendoerfer <tsbogend@alpha.franken.de>, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH v2 1/4] MIPS: ingenic: add new machine type MACH_JZ4755 Date: Sun, 16 Oct 2022 18:01:06 +0300 Message-Id: <20221016150110.3020451-2-lis8215@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221016150110.3020451-1-lis8215@gmail.com> References: <20221016150110.3020451-1-lis8215@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746856994259221249?= X-GMAIL-MSGID: =?utf-8?q?1746856994259221249?= |
Series |
Add Ingenic JZ4755 CGU driver
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Commit Message
Siarhei Volkau
Oct. 16, 2022, 3:01 p.m. UTC
which is close to jz4725b because it is actually a low price
successor of the jz4755.
It has the same MIPS32r1 core with Xburst(R) extension
MXU version 1 release 2.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
---
arch/mips/ingenic/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
Comments
Hi Siarhei, Le dim., oct. 16 2022 at 18:01:06 +0300, Siarhei Volkau <lis8215@gmail.com> a écrit : > which is close to jz4725b because it is actually a low price > successor of the jz4755. > It has the same MIPS32r1 core with Xburst(R) extension > MXU version 1 release 2. > > Signed-off-by: Siarhei Volkau <lis8215@gmail.com> This patch doesn't really belong in the CGU patchset. It should go through the MIPS tree. I see why you include it, but you do not need to have the MACH_JZ4755 symbol defined anywhere for the "default MACH_JZ4755" to work, it will just default to false until the patchset that adds JZ4755 support is merged in the MIPS tree. Cheers, -Paul > --- > arch/mips/ingenic/Kconfig | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/mips/ingenic/Kconfig b/arch/mips/ingenic/Kconfig > index f595b339a..edd84cf13 100644 > --- a/arch/mips/ingenic/Kconfig > +++ b/arch/mips/ingenic/Kconfig > @@ -4,6 +4,7 @@ config MACH_INGENIC_GENERIC > bool > select MACH_INGENIC > select MACH_JZ4740 > + select MACH_JZ4755 > select MACH_JZ4725B > select MACH_JZ4770 > select MACH_JZ4780 > @@ -53,6 +54,10 @@ config MACH_JZ4740 > bool > select SYS_HAS_CPU_MIPS32_R1 > > +config MACH_JZ4755 > + bool > + select SYS_HAS_CPU_MIPS32_R1 > + > config MACH_JZ4770 > bool > select MIPS_CPU_SCACHE > -- > 2.36.1 >
пн, 17 окт. 2022 г. в 12:10, Paul Cercueil <paul@crapouillou.net>: > I see why you include it, but you do not need to have the MACH_JZ4755 > symbol defined anywhere for the "default MACH_JZ4755" to work, it will > just default to false until the patchset that adds JZ4755 support is > merged in the MIPS tree. Thank you for the clarification, Paul. Will be done in the next version.
diff --git a/arch/mips/ingenic/Kconfig b/arch/mips/ingenic/Kconfig index f595b339a..edd84cf13 100644 --- a/arch/mips/ingenic/Kconfig +++ b/arch/mips/ingenic/Kconfig @@ -4,6 +4,7 @@ config MACH_INGENIC_GENERIC bool select MACH_INGENIC select MACH_JZ4740 + select MACH_JZ4755 select MACH_JZ4725B select MACH_JZ4770 select MACH_JZ4780 @@ -53,6 +54,10 @@ config MACH_JZ4740 bool select SYS_HAS_CPU_MIPS32_R1 +config MACH_JZ4755 + bool + select SYS_HAS_CPU_MIPS32_R1 + config MACH_JZ4770 bool select MIPS_CPU_SCACHE