[v2,12/16] dt-bindings: soc: socionext: Add UniPhier media I/O block
Commit Message
Add devicetree binding schema for the media I/O block implemented on
Socionext Uniphier SoCs. This block is implemented on LD4, sLD8, Pro4,
and LD11 SoCs.
Media I/O block implemented on Socionext UniPhier SoCs is an integrated
component of the stream type peripherals including SD, USB2.0, eMMC,
and MIO-DMAC.
Media I/O block has a common logic to control the component.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
.../socionext/socionext,uniphier-mioctrl.yaml | 66 +++++++++++++++++++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml
Comments
On Wed, 07 Dec 2022 14:54:01 +0900, Kunihiko Hayashi wrote:
> Add devicetree binding schema for the media I/O block implemented on
> Socionext Uniphier SoCs. This block is implemented on LD4, sLD8, Pro4,
> and LD11 SoCs.
>
> Media I/O block implemented on Socionext UniPhier SoCs is an integrated
> component of the stream type peripherals including SD, USB2.0, eMMC,
> and MIO-DMAC.
>
> Media I/O block has a common logic to control the component.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> .../socionext/socionext,uniphier-mioctrl.yaml | 66 +++++++++++++++++++
> 1 file changed, 66 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221207055405.30940-13-hayashi.kunihiko@socionext.com
mioctrl@59810000: 'clock', 'reset' do not match any of the regexes: '^clock-controller(@[0-9a-f]+)?$', '^reset-controller(@[0-9a-f]+)?$', 'pinctrl-[0-9]+'
arch/arm/boot/dts/uniphier-ld4-ref.dtb
arch/arm/boot/dts/uniphier-pro4-ace.dtb
arch/arm/boot/dts/uniphier-pro4-ref.dtb
arch/arm/boot/dts/uniphier-pro4-sanji.dtb
arch/arm/boot/dts/uniphier-sld8-ref.dtb
mioctrl@5b3e0000: 'clock', 'reset' do not match any of the regexes: '^clock-controller(@[0-9a-f]+)?$', '^reset-controller(@[0-9a-f]+)?$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dtb
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dtb
new file mode 100644
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-mioctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier media I/O block (MIO) controller
+
+maintainers:
+ - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+
+description: |+
+ Media I/O block implemented on Socionext UniPhier SoCs is a legacy
+ integrated component of the stream type peripherals including USB2.0,
+ SD/eMMC, and MIO-DMAC.
+ Media I/O block has a common logic to control the component.
+
+ Recent SoCs have SD interface logic specialized only for SD functions
+ as a subset of media I/O block. See socionext,uniphier-sdctrl.yaml.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - socionext,uniphier-ld4-mioctrl
+ - socionext,uniphier-pro4-mioctrl
+ - socionext,uniphier-sld8-mioctrl
+ - socionext,uniphier-ld11-mioctrl
+ - const: simple-mfd
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+patternProperties:
+ "^clock-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/clock/socionext,uniphier-clock.yaml#
+
+ "^reset-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/reset/socionext,uniphier-reset.yaml#
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@5b3e0000 {
+ compatible = "socionext,uniphier-ld11-mioctrl",
+ "simple-mfd", "syscon";
+ reg = <0x5b3e0000 0x800>;
+
+ clock-controller {
+ compatible = "socionext,uniphier-ld11-mio-clock";
+ #clock-cells = <1>;
+ };
+
+ reset-controller {
+ compatible = "socionext,uniphier-ld11-mio-reset";
+ #reset-cells = <1>;
+ resets = <&sys_rst 7>;
+ };
+ };
+