[1/2] nvmem: stm32: add warning when upper OTPs are updated

Message ID 20221014170426.1.Ifa806ff30d7c669ba9a3df9c6b64698a2dcc073a@changeid
State New
Headers
Series [1/2] nvmem: stm32: add warning when upper OTPs are updated |

Commit Message

Patrick Delaunay Oct. 14, 2022, 3:04 p.m. UTC
  As the upper OTPs are ECC protected, they support only one 32 bits word
programming.
For a second modification of this word, these ECC become invalid and
this OTP will be no more accessible, the shadowed value is invalid.

This patch adds a warning to indicate an upper OTP update, because this
operation is dangerous as OTP is not locked by the driver after the first
update to avoid a second update.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
---

 drivers/nvmem/stm32-romem.c | 3 +++
 1 file changed, 3 insertions(+)
  

Comments

Patrick Delaunay Oct. 14, 2022, 3:44 p.m. UTC | #1
Hi,

On 10/14/22 17:04, Patrick Delaunay wrote:
> As the upper OTPs are ECC protected, they support only one 32 bits word
> programming.
> For a second modification of this word, these ECC become invalid and
> this OTP will be no more accessible, the shadowed value is invalid.
>
> This patch adds a warning to indicate an upper OTP update, because this
> operation is dangerous as OTP is not locked by the driver after the first
> update to avoid a second update.
>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
>
>   drivers/nvmem/stm32-romem.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c
> index 354be526897f..e3c3c333b5d1 100644
> --- a/drivers/nvmem/stm32-romem.c
> +++ b/drivers/nvmem/stm32-romem.c
> @@ -133,6 +133,9 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
>   		}
>   	}
>   
> +	if (offset + bytes >= priv->lower * 4)


Here I miss a dependency for "priv->lower" with a other preliminary 
patch for STM32MP13x support.


> +		dev_warn(dev, "Update of upper OTPs with ECC protection (word programming, only once)\n");
> +
>   	return 0;
>   }
>   


Sorry,

I will sent a V2 soon


Patrick
  
kernel test robot Oct. 17, 2022, 10:36 a.m. UTC | #2
Hi Patrick,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on atorgue-stm32/stm32-next]
[also build test ERROR on linus/master v6.1-rc1 next-20221017]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Patrick-Delaunay/nvmem-stm32-add-warning-when-upper-OTPs-are-updated/20221017-102514
base:   https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next
patch link:    https://lore.kernel.org/r/20221014170426.1.Ifa806ff30d7c669ba9a3df9c6b64698a2dcc073a%40changeid
patch subject: [PATCH 1/2] nvmem: stm32: add warning when upper OTPs are updated
config: arc-randconfig-r023-20221017
compiler: arceb-elf-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/2f808f51f933798336822a96450c2c2797c2acc6
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Patrick-Delaunay/nvmem-stm32-add-warning-when-upper-OTPs-are-updated/20221017-102514
        git checkout 2f808f51f933798336822a96450c2c2797c2acc6
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash drivers/gpio/ drivers/nvmem/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/nvmem/stm32-romem.c: In function 'stm32_bsec_write':
>> drivers/nvmem/stm32-romem.c:136:35: error: 'struct stm32_romem_priv' has no member named 'lower'
     136 |         if (offset + bytes >= priv->lower * 4)
         |                                   ^~


vim +136 drivers/nvmem/stm32-romem.c

   114	
   115	static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
   116				    size_t bytes)
   117	{
   118		struct stm32_romem_priv *priv = context;
   119		struct device *dev = priv->cfg.dev;
   120		u32 *buf32 = buf;
   121		int ret, i;
   122	
   123		/* Allow only writing complete 32-bits aligned words */
   124		if ((bytes % 4) || (offset % 4))
   125			return -EINVAL;
   126	
   127		for (i = offset; i < offset + bytes; i += 4) {
   128			ret = stm32_bsec_smc(STM32_SMC_PROG_OTP, i >> 2, *buf32++,
   129					     NULL);
   130			if (ret) {
   131				dev_err(dev, "Can't write data%d (%d)\n", i >> 2, ret);
   132				return ret;
   133			}
   134		}
   135	
 > 136		if (offset + bytes >= priv->lower * 4)
   137			dev_warn(dev, "Update of upper OTPs with ECC protection (word programming, only once)\n");
   138	
   139		return 0;
   140	}
   141
  

Patch

diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c
index 354be526897f..e3c3c333b5d1 100644
--- a/drivers/nvmem/stm32-romem.c
+++ b/drivers/nvmem/stm32-romem.c
@@ -133,6 +133,9 @@  static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
 		}
 	}
 
+	if (offset + bytes >= priv->lower * 4)
+		dev_warn(dev, "Update of upper OTPs with ECC protection (word programming, only once)\n");
+
 	return 0;
 }