diff mbox series

[7/8] dt-bindings: soc: socionext: Add UniPhier DWC3 USB glue layer

Message ID 20221129103509.9958-8-hayashi.kunihiko@socionext.com
State New
Headers
Series dt-bidnings: soc: Introduce UniPhier miscelaneous register blocks |

Commit Message

Kunihiko Hayashi Nov. 29, 2022, 10:35 a.m. UTC 
  Add DT binding schema for components belonging to the platform-specific
DWC3 USB glue layer implemented in UniPhier SoCs.

This USB glue layer works as a sideband logic for the host controller,
including core reset, vbus control, PHYs, and some signals to the
controller.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 .../socionext,uniphier-dwc3-glue.yaml         | 106 ++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml

Comments

Rob Herring Nov. 29, 2022, 1:32 p.m. UTC | #1 
On Tue, 29 Nov 2022 19:35:08 +0900, Kunihiko Hayashi wrote:
> Add DT binding schema for components belonging to the platform-specific
> DWC3 USB glue layer implemented in UniPhier SoCs.
> 
> This USB glue layer works as a sideband logic for the host controller,
> including core reset, vbus control, PHYs, and some signals to the
> controller.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  .../socionext,uniphier-dwc3-glue.yaml         | 106 ++++++++++++++++++
>  1 file changed, 106 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dtb: usb-glue@65b00000: 'reg' is a required property
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dtb: usb-glue@65b00000: 'ss-phy@300' does not match any of the regexes: '^phy@[0-9a-f]+$', '^regulator@[0-9a-f]+$', '^reset-controller@[0-9a-f]+$', 'pinctrl-[0-9]+'
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dtb: usb-glue@65b00000: 'reg' is a required property
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dtb: usb-glue@65b00000: 'hs-phy@200' does not match any of the regexes: '^phy@[0-9a-f]+$', '^regulator@[0-9a-f]+$', '^reset-controller@[0-9a-f]+$', 'pinctrl-[0-9]+'
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221129103509.9958-8-hayashi.kunihiko@socionext.com

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command.
Krzysztof Kozlowski Nov. 29, 2022, 2:52 p.m. UTC | #2 
On 29/11/2022 11:35, Kunihiko Hayashi wrote:
> Add DT binding schema for components belonging to the platform-specific
> DWC3 USB glue layer implemented in UniPhier SoCs.
> 
> This USB glue layer works as a sideband logic for the host controller,
> including core reset, vbus control, PHYs, and some signals to the
> controller.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  .../socionext,uniphier-dwc3-glue.yaml         | 106 ++++++++++++++++++
>  1 file changed, 106 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
> new file mode 100644
> index 000000000000..66f8786dd305
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
> @@ -0,0 +1,106 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
> +
> +maintainers:
> +  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> +
> +description: |+
> +  DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
> +  a sideband logic handling signals to DWC3 host controller inside
> +  USB3.0 component.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - socionext,uniphier-pro4-dwc3-glue
> +          - socionext,uniphier-pro5-dwc3-glue
> +          - socionext,uniphier-pxs2-dwc3-glue
> +          - socionext,uniphier-ld20-dwc3-glue
> +          - socionext,uniphier-pxs3-dwc3-glue
> +          - socionext,uniphier-nx1-dwc3-glue
> +      - const: simple-mfd
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^reset-controller@[0-9a-f]+$":
> +    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
> +
> +  "^regulator@[0-9a-f]+$":
> +    $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
> +
> +  "^phy@[0-9a-f]+$":
> +    oneOf:
> +      - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
> +      - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    usb-controller@65b00000 {

Node name: usb. There is no usage of "usb-controller".

> +        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
> +        reg = <0x65b00000 0x400>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0 0x65b00000 0x400>;
> +
> +        reset-controller@0 {
> +            compatible = "socionext,uniphier-ld20-usb3-reset";
> +            reg = <0x0 0x4>;

So now I see the unit addresses, which means none of your previous
patches needed them. This raises next question - why this device is
special and does not use syscon but own unit address?

Are the children here - regulator, reset controller and phys - related
to the USB?

Best regards,
Krzysztof
Kunihiko Hayashi Nov. 30, 2022, 9 a.m. UTC | #3 
Hi Krzysztof,

On 2022/11/29 23:52, Krzysztof Kozlowski wrote:
> On 29/11/2022 11:35, Kunihiko Hayashi wrote:
>> Add DT binding schema for components belonging to the platform-specific
>> DWC3 USB glue layer implemented in UniPhier SoCs.
>>
>> This USB glue layer works as a sideband logic for the host controller,
>> including core reset, vbus control, PHYs, and some signals to the
>> controller.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>>   .../socionext,uniphier-dwc3-glue.yaml         | 106 ++++++++++++++++++
>>   1 file changed, 106 insertions(+)
>>   create mode 100644
>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>>
>> diff --git
>> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>> new file mode 100644
>> index 000000000000..66f8786dd305
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>> @@ -0,0 +1,106 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
>> +
>> +maintainers:
>> +  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> +
>> +description: |+
>> +  DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
>> +  a sideband logic handling signals to DWC3 host controller inside
>> +  USB3.0 component.
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +          - socionext,uniphier-pro4-dwc3-glue
>> +          - socionext,uniphier-pro5-dwc3-glue
>> +          - socionext,uniphier-pxs2-dwc3-glue
>> +          - socionext,uniphier-ld20-dwc3-glue
>> +          - socionext,uniphier-pxs3-dwc3-glue
>> +          - socionext,uniphier-nx1-dwc3-glue
>> +      - const: simple-mfd
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  '#address-cells':
>> +    const: 1
>> +
>> +  '#size-cells':
>> +    const: 1
>> +
>> +  ranges: true
>> +
>> +patternProperties:
>> +  "^reset-controller@[0-9a-f]+$":
>> +    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
>> +
>> +  "^regulator@[0-9a-f]+$":
>> +    $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
>> +
>> +  "^phy@[0-9a-f]+$":
>> +    oneOf:
>> +      - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
>> +      - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    usb-controller@65b00000 {
> 
> Node name: usb. There is no usage of "usb-controller".

I'm confusing about that.

This is an interface logic and doesn't have USB functions by itself.
Surely there is a USB host controller node "usb@..." in the same SoC.
Can this node be renamed to "usb"?

I've renamed the dts node name once in commit 4cc752a88ca9
("arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller").

>> +        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
>> +        reg = <0x65b00000 0x400>;
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +        ranges = <0 0x65b00000 0x400>;
>> +
>> +        reset-controller@0 {
>> +            compatible = "socionext,uniphier-ld20-usb3-reset";
>> +            reg = <0x0 0x4>;
> 
> So now I see the unit addresses, which means none of your previous
> patches needed them. This raises next question - why this device is
> special and does not use syscon but own unit address?

The glue layer has a fixed register address for each child unlike
the previous patch.

This layer has also the other registers for USB core outside
the child nodes, however, there is no parent device that manages
these registers, so this layer node itself should take care of these
registers.

> Are the children here - regulator, reset controller and phys - related
> to the USB?

Yes, this "glue layer" is an interface of the USB controller, so these
children are only used for the USB controller.

Thank you,
---
Best Regards
Kunihiko Hayashi
Krzysztof Kozlowski Nov. 30, 2022, 3:32 p.m. UTC | #4 
On 30/11/2022 10:00, Kunihiko Hayashi wrote:
> Hi Krzysztof,
> 
> On 2022/11/29 23:52, Krzysztof Kozlowski wrote:
>> On 29/11/2022 11:35, Kunihiko Hayashi wrote:
>>> Add DT binding schema for components belonging to the platform-specific
>>> DWC3 USB glue layer implemented in UniPhier SoCs.
>>>
>>> This USB glue layer works as a sideband logic for the host controller,
>>> including core reset, vbus control, PHYs, and some signals to the
>>> controller.
>>>
>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>> ---
>>>   .../socionext,uniphier-dwc3-glue.yaml         | 106 ++++++++++++++++++
>>>   1 file changed, 106 insertions(+)
>>>   create mode 100644
>>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>>> new file mode 100644
>>> index 000000000000..66f8786dd305
>>> --- /dev/null
>>> +++
>>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
>>> @@ -0,0 +1,106 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id:
>>> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
>>> +
>>> +maintainers:
>>> +  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>> +
>>> +description: |+
>>> +  DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
>>> +  a sideband logic handling signals to DWC3 host controller inside
>>> +  USB3.0 component.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - enum:
>>> +          - socionext,uniphier-pro4-dwc3-glue
>>> +          - socionext,uniphier-pro5-dwc3-glue
>>> +          - socionext,uniphier-pxs2-dwc3-glue
>>> +          - socionext,uniphier-ld20-dwc3-glue
>>> +          - socionext,uniphier-pxs3-dwc3-glue
>>> +          - socionext,uniphier-nx1-dwc3-glue
>>> +      - const: simple-mfd
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +  '#address-cells':
>>> +    const: 1
>>> +
>>> +  '#size-cells':
>>> +    const: 1
>>> +
>>> +  ranges: true
>>> +
>>> +patternProperties:
>>> +  "^reset-controller@[0-9a-f]+$":
>>> +    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
>>> +
>>> +  "^regulator@[0-9a-f]+$":
>>> +    $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
>>> +
>>> +  "^phy@[0-9a-f]+$":
>>> +    oneOf:
>>> +      - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
>>> +      - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    usb-controller@65b00000 {
>>
>> Node name: usb. There is no usage of "usb-controller".
> 
> I'm confusing about that.
> 
> This is an interface logic and doesn't have USB functions by itself.
> Surely there is a USB host controller node "usb@..." in the same SoC.
> Can this node be renamed to "usb"?
> 
> I've renamed the dts node name once in commit 4cc752a88ca9
> ("arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller").

In (almost?) all other cases it is still called "usb". A bit akward to
have usb in usb, but usb-controller did not stick...

> 
>>> +        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
>>> +        reg = <0x65b00000 0x400>;
>>> +        #address-cells = <1>;
>>> +        #size-cells = <1>;
>>> +        ranges = <0 0x65b00000 0x400>;
>>> +
>>> +        reset-controller@0 {
>>> +            compatible = "socionext,uniphier-ld20-usb3-reset";
>>> +            reg = <0x0 0x4>;
>>
>> So now I see the unit addresses, which means none of your previous
>> patches needed them. This raises next question - why this device is
>> special and does not use syscon but own unit address?
> 
> The glue layer has a fixed register address for each child unlike
> the previous patch.
> 
> This layer has also the other registers for USB core outside
> the child nodes, however, there is no parent device that manages
> these registers, so this layer node itself should take care of these
> registers.
> 
>> Are the children here - regulator, reset controller and phys - related
>> to the USB?
> 
> Yes, this "glue layer" is an interface of the USB controller, so these
> children are only used for the USB controller.


OK

Best regards,
Krzysztof
Kunihiko Hayashi Dec. 1, 2022, 8:30 a.m. UTC | #5 
On 2022/12/01 0:32, Krzysztof Kozlowski wrote:
> On 30/11/2022 10:00, Kunihiko Hayashi wrote:
>> Hi Krzysztof,
>>
>> On 2022/11/29 23:52, Krzysztof Kozlowski wrote:
>>> On 29/11/2022 11:35, Kunihiko Hayashi wrote:
>>>> Add DT binding schema for components belonging to the platform-specific
>>>> DWC3 USB glue layer implemented in UniPhier SoCs.
>>>>
>>>> This USB glue layer works as a sideband logic for the host controller,
>>>> including core reset, vbus control, PHYs, and some signals to the
>>>> controller.
>>>>
>>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

(snip)

>>>> +examples:
>>>> +  - |
>>>> +    usb-controller@65b00000 {
>>>
>>> Node name: usb. There is no usage of "usb-controller".
>>
>> I'm confusing about that.
>>
>> This is an interface logic and doesn't have USB functions by itself.
>> Surely there is a USB host controller node "usb@..." in the same SoC.
>> Can this node be renamed to "usb"?
>>
>> I've renamed the dts node name once in commit 4cc752a88ca9
>> ("arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller").
> 
> In (almost?) all other cases it is still called "usb". A bit akward to
> have usb in usb, but usb-controller did not stick...

I see.
I understand that it is still better to use the generic name "usb"
rather than "usb-controller".

Thank you,

---
Best Regards
Kunihiko Hayashi
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
new file mode 100644
index 000000000000..66f8786dd305
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
@@ -0,0 +1,106 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
+
+maintainers:
+  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+
+description: |+
+  DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
+  a sideband logic handling signals to DWC3 host controller inside
+  USB3.0 component.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - socionext,uniphier-pro4-dwc3-glue
+          - socionext,uniphier-pro5-dwc3-glue
+          - socionext,uniphier-pxs2-dwc3-glue
+          - socionext,uniphier-ld20-dwc3-glue
+          - socionext,uniphier-pxs3-dwc3-glue
+          - socionext,uniphier-nx1-dwc3-glue
+      - const: simple-mfd
+
+  reg:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges: true
+
+patternProperties:
+  "^reset-controller@[0-9a-f]+$":
+    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
+
+  "^regulator@[0-9a-f]+$":
+    $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
+
+  "^phy@[0-9a-f]+$":
+    oneOf:
+      - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
+      - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    usb-controller@65b00000 {
+        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
+        reg = <0x65b00000 0x400>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x65b00000 0x400>;
+
+        reset-controller@0 {
+            compatible = "socionext,uniphier-ld20-usb3-reset";
+            reg = <0x0 0x4>;
+            #reset-cells = <1>;
+            clock-names = "link";
+            clocks = <&sys_clk 14>;
+            reset-names = "link";
+            resets = <&sys_rst 14>;
+        };
+
+        regulator@100 {
+            compatible = "socionext,uniphier-ld20-usb3-regulator";
+            reg = <0x100 0x10>;
+            clock-names = "link";
+            clocks = <&sys_clk 14>;
+            reset-names = "link";
+            resets = <&sys_rst 14>;
+        };
+
+        phy@200 {
+            compatible = "socionext,uniphier-ld20-usb3-hsphy";
+            reg = <0x200 0x10>;
+            #phy-cells = <0>;
+            clock-names = "link", "phy";
+            clocks = <&sys_clk 14>, <&sys_clk 16>;
+            reset-names = "link", "phy";
+            resets = <&sys_rst 14>, <&sys_rst 16>;
+        };
+
+        phy@300 {
+            compatible = "socionext,uniphier-ld20-usb3-ssphy";
+            reg = <0x300 0x10>;
+            #phy-cells = <0>;
+            clock-names = "link", "phy";
+            clocks = <&sys_clk 14>, <&sys_clk 18>;
+            reset-names = "link", "phy";
+            resets = <&sys_rst 14>, <&sys_rst 18>;
+        };
+    };
+