Message ID | 20221118133216.17037-5-walker.chen@starfivetech.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp206861wrr; Fri, 18 Nov 2022 05:56:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf4anKs8DcjEvV8u5sd5Snh5JprqEg2w2fZCZIQZruXHWEQd2EAkSu56/WwBc1ckS7shMDnK X-Received: by 2002:a05:6402:3808:b0:468:c911:d843 with SMTP id es8-20020a056402380800b00468c911d843mr6126298edb.422.1668779793648; Fri, 18 Nov 2022 05:56:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668779793; cv=none; d=google.com; s=arc-20160816; b=nTXaQpi0Rmz6sWv4jvqUIJJyPS+NAE4oznpyY/9GXkykP+Dx3Hxt+4okHTeAF5wtCG ka4JDT3S34z4DfAMokyN9hGDbDiTtjFgxnSVeqD9QbM+jA2Es0lz02G8JhwapyScOthD EVucrBbyZxCJO6QKYkQyzb0cqvPrbptt7GW2GF/Q0gmQzh2PZBHuWJbDo9m43pCSmeFX /1qWsZyMZgH62Jk/VUB0Y/mQoo+KkZ9PWMUY6ie8QsABn/WehcsSozVPMxyL+8BCBuXt jLPiRf0F3NBV+XR3di1Hq8tKLmZq6YQ4UJaDIQEVwXU5R07yXw+IuI6t+Jt7vWUvx3gF Q8QA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=6Aq3MelE3dRN7Ly8U4jI2r8oGyjaDJfhD2uDssdFfXw=; b=BkWhQIAsQkvfOaGr10RWGbNupJ1Sa/soKeKGqXnqPnTzR+3IIVXVC11WgE0tKKUuHc Ep+Cful69qV08AUUGpsilRb01jybDLEZP380fbCUsYRlLVtsvZkr/LauBKzk2ly4sMUj 4+hFjIubf/rWkueWSLEbbpAnuFCSZWSaKnareQzNFRUtjKwbltuDX6Rwkjan7IKdmr/w dy/TU7uv8qMDiqYG4tpE3ZJZ28SxOjnDSJ14iS0r8UnlVVYD9cdI1HT8gFC9aGqHOD08 spQnKmPYTf9KQKD44Lmo/5HsEot3dxAyVaCfXc4fNzhckZhH7yOx0/vmD6NcEUZKQaMS NLjw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hv11-20020a17090760cb00b007ad6a0afbc6si2934640ejc.7.2022.11.18.05.56.08; Fri, 18 Nov 2022 05:56:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242114AbiKRNgq (ORCPT <rfc822;kkmonlee@gmail.com> + 99 others); Fri, 18 Nov 2022 08:36:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242243AbiKRNgQ (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 18 Nov 2022 08:36:16 -0500 X-Greylist: delayed 108 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 18 Nov 2022 05:34:19 PST Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBBCA942DF; Fri, 18 Nov 2022 05:34:18 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 0171224E287; Fri, 18 Nov 2022 21:32:30 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 21:32:30 +0800 Received: from localhost.localdomain (183.27.96.116) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 21:32:28 +0800 From: Walker Chen <walker.chen@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org> CC: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor.dooley@microchip.com>, "Rafael J . Wysocki" <rafael@kernel.org>, Walker Chen <walker.chen@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v1 4/4] riscv: dts: starfive: add power controller node Date: Fri, 18 Nov 2022 21:32:16 +0800 Message-ID: <20221118133216.17037-5-walker.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221118133216.17037-1-walker.chen@starfivetech.com> References: <20221118133216.17037-1-walker.chen@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749842441150372305?= X-GMAIL-MSGID: =?utf-8?q?1749842441150372305?= |
Series |
JH7110 Power Domain Support
|
|
Commit Message
Walker Chen
Nov. 18, 2022, 1:32 p.m. UTC
This adds the power controller node for the Starfive JH7110 SoC.
The pmu needs to be used by other modules such as ISP, VPU, etc.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
Comments
On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@starfivetech.com> wrote: > > This adds the power controller node for the Starfive JH7110 SoC. > The pmu needs to be used by other modules such as ISP, VPU, etc. > > Signed-off-by: Walker Chen <walker.chen@starfivetech.com> Hi Walker, You called the driver jh71xx which suggests it also applies to the jh7100. Are you missing a node in the jh7100 device tree? > --- > arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index c22e8f1d2640..fa7b60b82d71 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -356,6 +356,13 @@ > #gpio-cells = <2>; > }; > > + pwrc: power-controller@17030000 { > + compatible = "starfive,jh7110-pmu"; > + reg = <0x0 0x17030000 0x0 0x10000>; > + interrupts = <111>; > + #power-domain-cells = <1>; > + }; > + > uart0: serial@10000000 { > compatible = "snps,dw-apb-uart"; > reg = <0x0 0x10000000 0x0 0x10000>; > -- > 2.17.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On 2022/11/19 2:36, Emil Renner Berthing wrote: > On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@starfivetech.com> wrote: >> >> This adds the power controller node for the Starfive JH7110 SoC. >> The pmu needs to be used by other modules such as ISP, VPU, etc. >> >> Signed-off-by: Walker Chen <walker.chen@starfivetech.com> > > Hi Walker, > > You called the driver jh71xx which suggests it also applies to the > jh7100. Are you missing a node in the jh7100 device tree? No, there is no power domain controller on the jh7100. Our next generation of chips jh7120 will still use this power management unit, so here this driver name is called jh71xx_pmu.c or changed to jh71xx_power.c , do you think such a name is appropriate ? Your reply will be highly appreciated! > >> --- >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> index c22e8f1d2640..fa7b60b82d71 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> @@ -356,6 +356,13 @@ >> #gpio-cells = <2>; >> }; >> >> + pwrc: power-controller@17030000 { >> + compatible = "starfive,jh7110-pmu"; >> + reg = <0x0 0x17030000 0x0 0x10000>; >> + interrupts = <111>; >> + #power-domain-cells = <1>; >> + }; >> + >> uart0: serial@10000000 { >> compatible = "snps,dw-apb-uart"; >> reg = <0x0 0x10000000 0x0 0x10000>; >> -- >> 2.17.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv
On Wed, 23 Nov 2022 at 03:12, Walker Chen <walker.chen@starfivetech.com> wrote: > > On 2022/11/19 2:36, Emil Renner Berthing wrote: > > On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@starfivetech.com> wrote: > >> > >> This adds the power controller node for the Starfive JH7110 SoC. > >> The pmu needs to be used by other modules such as ISP, VPU, etc. > >> > >> Signed-off-by: Walker Chen <walker.chen@starfivetech.com> > > > > Hi Walker, > > > > You called the driver jh71xx which suggests it also applies to the > > jh7100. Are you missing a node in the jh7100 device tree? > > No, there is no power domain controller on the jh7100. Our next generation of chips jh7120 will > still use this power management unit, so here this driver name is called jh71xx_pmu.c or changed > to jh71xx_power.c , do you think such a name is appropriate ? > Your reply will be highly appreciated! I see. In that case jh71xx seems appropriate, thanks. > > > >> --- > >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++ > >> 1 file changed, 7 insertions(+) > >> > >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> index c22e8f1d2640..fa7b60b82d71 100644 > >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> @@ -356,6 +356,13 @@ > >> #gpio-cells = <2>; > >> }; > >> > >> + pwrc: power-controller@17030000 { > >> + compatible = "starfive,jh7110-pmu"; > >> + reg = <0x0 0x17030000 0x0 0x10000>; > >> + interrupts = <111>; > >> + #power-domain-cells = <1>; > >> + }; > >> + > >> uart0: serial@10000000 { > >> compatible = "snps,dw-apb-uart"; > >> reg = <0x0 0x10000000 0x0 0x10000>; > >> -- > >> 2.17.1 > >> > >> > >> _______________________________________________ > >> linux-riscv mailing list > >> linux-riscv@lists.infradead.org > >> http://lists.infradead.org/mailman/listinfo/linux-riscv >
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index c22e8f1d2640..fa7b60b82d71 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -356,6 +356,13 @@ #gpio-cells = <2>; }; + pwrc: power-controller@17030000 { + compatible = "starfive,jh7110-pmu"; + reg = <0x0 0x17030000 0x0 0x10000>; + interrupts = <111>; + #power-domain-cells = <1>; + }; + uart0: serial@10000000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x10000000 0x0 0x10000>;