Message ID | 20221129140313.886192-2-apatel@ventanamicro.com |
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State | New |
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Series |
Improve CLOCK_EVT_FEAT_C3STOP feature setting
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Commit Message
Anup Patel
Nov. 29, 2022, 2:03 p.m. UTC
From: Conor Dooley <conor.dooley@microchip.com> Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize broadcast hrtimer based clock event device"), RISC-V needs to initiate hrtimers before C3STOP can be used. Otherwise, the introduction of C3STOP for the RISC-V arch timer in commit 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") breaks timer behaviour, for example clock_nanosleep(). A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250 & C3STOP enabled, the sleep times are rounded up to the next jiffy: == CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 == Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179 Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193 Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000 Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000 Samples: 521 Samples: 521 Samples: 521 Samples: 521 Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/ Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") Suggested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/kernel/time.c | 3 +++ 1 file changed, 3 insertions(+)
Comments
On 11/29/22 08:03, Anup Patel wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize > broadcast hrtimer based clock event device"), RISC-V needs to initiate > hrtimers before C3STOP can be used. Otherwise, the introduction of C3STOP Specifically it is the hrtimer-based broadcast clockevent that we need to initialize, not hrtimers as a whole. > for the RISC-V arch timer in commit 232ccac1bd9b > ("clocksource/drivers/riscv: Events are stopped during CPU suspend") Maybe add some more details here: ... leaves us without any broadcast timer registered. This prevents the kernel from entering oneshot mode, which ... > breaks timer behaviour, for example clock_nanosleep(). > > A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250 > & C3STOP enabled, the sleep times are rounded up to the next jiffy: > == CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 == > Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179 > Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193 > Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000 > Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000 > Samples: 521 Samples: 521 Samples: 521 Samples: 521 > > Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/ > Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") > Suggested-by: Samuel Holland <samuel@sholland.org> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Either way: Reviewed-by: Samuel Holland <samuel@sholland.org> > --- > arch/riscv/kernel/time.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c > index 8217b0f67c6c..1cf21db4fcc7 100644 > --- a/arch/riscv/kernel/time.c > +++ b/arch/riscv/kernel/time.c > @@ -5,6 +5,7 @@ > */ > > #include <linux/of_clk.h> > +#include <linux/clockchips.h> > #include <linux/clocksource.h> > #include <linux/delay.h> > #include <asm/sbi.h> > @@ -29,6 +30,8 @@ void __init time_init(void) > > of_clk_init(NULL); > timer_probe(); > + > + tick_setup_hrtimer_broadcast(); > } > > void clocksource_arch_init(struct clocksource *cs)
diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 8217b0f67c6c..1cf21db4fcc7 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -5,6 +5,7 @@ */ #include <linux/of_clk.h> +#include <linux/clockchips.h> #include <linux/clocksource.h> #include <linux/delay.h> #include <asm/sbi.h> @@ -29,6 +30,8 @@ void __init time_init(void) of_clk_init(NULL); timer_probe(); + + tick_setup_hrtimer_broadcast(); } void clocksource_arch_init(struct clocksource *cs)