Message ID | d36f8c70e103bd6f740ebfaa512d246188aadf10.1708551850.git.quic_uchalich@quicinc.com |
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State | New |
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Thu, 22 Feb 2024 23:08:11 GMT Received: from hu-uchalich-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 22 Feb 2024 15:08:07 -0800 From: Unnathi Chalicheemala <quic_uchalich@quicinc.com> To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Rob Herring <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> CC: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kernel@quicinc.com> Subject: [PATCH v3 4/5] arm64: dts: qcom: sm8550: Add mapping to llcc Broadcast_AND region Date: Thu, 22 Feb 2024 15:07:56 -0800 Message-ID: <d36f8c70e103bd6f740ebfaa512d246188aadf10.1708551850.git.quic_uchalich@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <cover.1708551850.git.quic_uchalich@quicinc.com> References: <cover.1708551850.git.quic_uchalich@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: J2MRjk42uQhZUqY6M3fO9yQBDTOFtHur X-Proofpoint-GUID: J2MRjk42uQhZUqY6M3fO9yQBDTOFtHur X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=609 malwarescore=0 impostorscore=0 bulkscore=0 adultscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 priorityscore=1501 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402220178 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791642467781360248 X-GMAIL-MSGID: 1791642467781360248 |
Series |
LLCC: Support for Broadcast_AND region
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Commit Message
Unnathi Chalicheemala
Feb. 22, 2024, 11:07 p.m. UTC
Mapping Broadcast_AND region for LLCC in SM8550.
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
Comments
On 23/02/2024 00:07, Unnathi Chalicheemala wrote:
> Mapping Broadcast_AND region for LLCC in SM8550.
I don't understand this sentence and I still do not know why.
Best regards,
Krzysztof
On 2/27/2024 7:49 AM, Krzysztof Kozlowski wrote: > On 23/02/2024 00:07, Unnathi Chalicheemala wrote: >> Mapping Broadcast_AND region for LLCC in SM8550. > > I don't understand this sentence and I still do not know why. > The check of whether status bit is 1 in the driver is being done with the wrong register all along (sm8450 onwards). So I am adding the base address of the right register region in the DeviceTree files. I can add this explanation to the commit message of these patches if you think that would help. > Best regards, > Krzysztof >
On 28.02.2024 02:17, Unnathi Chalicheemala wrote: > On 2/27/2024 7:49 AM, Krzysztof Kozlowski wrote: >> On 23/02/2024 00:07, Unnathi Chalicheemala wrote: >>> Mapping Broadcast_AND region for LLCC in SM8550. "Map" would be grammatically connect here >> >> I don't understand this sentence and I still do not know why. >> > > The check of whether status bit is 1 in the driver is being done > with the wrong register all along (sm8450 onwards). So I am adding > the base address of the right register region in the DeviceTree files. > > I can add this explanation to the commit message of these > patches if you think that would help. Yes, the commit message should definitely state the problem, and if not obvious, the reason for the solution. Paraphrasing Greg KH (I think?), the maintainers are going to assume your patch is unnecessary and your job is to convince them that it's not the case. You do it through good code and meaningful commit titles& messages. Please refer to [1]. Konrad [1] https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index ee1ba5a8c8fc..1a52e30330c3 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -4193,12 +4193,14 @@ system-cache-controller@25000000 { <0 0x25200000 0 0x200000>, <0 0x25400000 0 0x200000>, <0 0x25600000 0 0x200000>, - <0 0x25800000 0 0x200000>; + <0 0x25800000 0 0x200000>, + <0 0x25a00000 0 0x200000>; reg-names = "llcc0_base", "llcc1_base", "llcc2_base", "llcc3_base", - "llcc_broadcast_base"; + "llcc_broadcast_base", + "llcc_broadcast_and_base"; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; };