diff mbox series

[1/7] sched/balancing: Switch the 'DEFINE_SPINLOCK(balancing)' spinlock into an 'atomic_t sched_balance_running' flag

Message ID 20240301110951.3707367-2-mingo@kernel.org
State New
Headers
Series sched/balancing: Misc updates & cleanups |

Commit Message

Ingo Molnar March 1, 2024, 11:09 a.m. UTC 
  The 'balancing' spinlock added in:

  08c183f31bdb ("[PATCH] sched: add option to serialize load balancing")

.. is taken when the SD_SERIALIZE flag is set in a domain, but in reality it
is a glorified global atomic flag serializing the load-balancing of
those domains.

It doesn't have any explicit locking semantics per se: we just
spin_trylock() it.

Turn it into a ... global atomic flag. This makes it more
clear what is going on here, and reduces overhead and code
size a bit:

  # kernel/sched/fair.o: [x86-64 defconfig]

     text	   data	    bss	    dec	    hex	filename
    60730	   2721	    104	  63555	   f843	fair.o.before
    60718	   2721	    104	  63543	   f837	fair.o.after

Also document the flag a bit.

No change in functionality intended.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Valentin Schneider <vschneid@redhat.com>
---
 kernel/sched/fair.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

Comments

Shrikanth Hegde March 1, 2024, 3:35 p.m. UTC | #1 
On 3/1/24 4:39 PM, Ingo Molnar wrote:
> The 'balancing' spinlock added in:

Hi Ingo. 

> 
>   08c183f31bdb ("[PATCH] sched: add option to serialize load balancing")
>

 
[...]

>  
>  		need_serialize = sd->flags & SD_SERIALIZE;
>  		if (need_serialize) {
> -			if (!spin_trylock(&balancing))
> +			if (atomic_cmpxchg_acquire(&sched_balance_running, 0, 1))

Thinking from very little I know, I may be completely wrong. 

Is it possible that arch_spin_trylock, which would be called from spin_trylock is 
faster in some architectures? Maybe in contended case? 

For example, in powerpc, queued_spin_trylock, uses more optimal ll/sc style access patterns 
rather than cmpxchg. 
https://lore.kernel.org/all/20221126095932.1234527-4-npiggin@gmail.com/

+nick 


>  				goto out;
>  		}
>  
> @@ -11729,7 +11742,7 @@ static void rebalance_domains(struct rq *rq, enum cpu_idle_type idle)
>  			interval = get_sd_balance_interval(sd, busy);
>  		}
>  		if (need_serialize)
> -			spin_unlock(&balancing);
> +			atomic_set_release(&sched_balance_running, 0);
>  out:
>  		if (time_after(next_balance, sd->last_balance + interval)) {
>  			next_balance = sd->last_balance + interval;
Ingo Molnar March 4, 2024, 9:24 a.m. UTC | #2 
* Shrikanth Hegde <sshegde@linux.ibm.com> wrote:

> 
> 
> On 3/1/24 4:39 PM, Ingo Molnar wrote:
> > The 'balancing' spinlock added in:
> 
> Hi Ingo. 
> 
> > 
> >   08c183f31bdb ("[PATCH] sched: add option to serialize load balancing")
> >
> 
>  
> [...]
> 
> >  
> >  		need_serialize = sd->flags & SD_SERIALIZE;
> >  		if (need_serialize) {
> > -			if (!spin_trylock(&balancing))
> > +			if (atomic_cmpxchg_acquire(&sched_balance_running, 0, 1))
> 
> Thinking from very little I know, I may be completely wrong. 
> 
> Is it possible that arch_spin_trylock, which would be called from spin_trylock is 
> faster in some architectures? Maybe in contended case? 

This code path should never really be 'contended': SD_SERIALIZE is only set 
for the outermost, largest domains (NUMA and up) that get balanced 
infrequently. This change is more for the sake of readability: a flag 
disguised as a spinlock.

Thanks,

	Ingo
diff mbox series

Patch

diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 6a16129f9a5c..64ae3d8dc93b 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -11633,7 +11633,20 @@  static int active_load_balance_cpu_stop(void *data)
 	return 0;
 }
 
-static DEFINE_SPINLOCK(balancing);
+/*
+ * This flag serializes load-balancing passes over large domains
+ * (such as SD_NUMA) - only once load-balancing instance may run
+ * at a time, to reduce overhead on very large systems with lots
+ * of CPUs and large NUMA distances.
+ *
+ * - Note that load-balancing passes triggered while another one
+ *   is executing are skipped and not re-tried.
+ *
+ * - Also note that this does not serialize sched_balance_domains()
+ *   execution, as non-SD_SERIALIZE domains will still be
+ *   load-balanced in parallel.
+ */
+static atomic_t sched_balance_running = ATOMIC_INIT(0);
 
 /*
  * Scale the max load_balance interval with the number of CPUs in the system.
@@ -11711,7 +11724,7 @@  static void rebalance_domains(struct rq *rq, enum cpu_idle_type idle)
 
 		need_serialize = sd->flags & SD_SERIALIZE;
 		if (need_serialize) {
-			if (!spin_trylock(&balancing))
+			if (atomic_cmpxchg_acquire(&sched_balance_running, 0, 1))
 				goto out;
 		}
 
@@ -11729,7 +11742,7 @@  static void rebalance_domains(struct rq *rq, enum cpu_idle_type idle)
 			interval = get_sd_balance_interval(sd, busy);
 		}
 		if (need_serialize)
-			spin_unlock(&balancing);
+			atomic_set_release(&sched_balance_running, 0);
 out:
 		if (time_after(next_balance, sd->last_balance + interval)) {
 			next_balance = sd->last_balance + interval;