[net-next,v6,04/11] dt-bindings: net: convert hisi-femac.txt to YAML
Commit Message
From: Yang Xiwen <forbidden405@outlook.com>
convert the old text biinding to new YAML. No semantic change.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
---
.../bindings/net/hisilicon,hisi-femac.yaml | 82 ++++++++++++++++++++++
.../devicetree/bindings/net/hisilicon-femac.txt | 41 -----------
2 files changed, 82 insertions(+), 41 deletions(-)
Comments
On 28/02/2024 10:02, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <forbidden405@outlook.com>
>
> convert the old text biinding to new YAML. No semantic change.
Typo: binding. Also missing capital letter.
>
> Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
> ---
> .../bindings/net/hisilicon,hisi-femac.yaml | 82 ++++++++++++++++++++++
> .../devicetree/bindings/net/hisilicon-femac.txt | 41 -----------
> 2 files changed, 82 insertions(+), 41 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
> new file mode 100644
> index 000000000000..016e9e409a30
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon Fast Ethernet MAC controller
> +
> +maintainers:
> + - Yang Xiwen <forbidden405@foxmail.com>
> +
> +allOf:
> + - $ref: ethernet-controller.yaml
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - hisilicon,hi3516cv300-femac
> + - enum:
> + - hisilicon,hisi-femac-v1
> + - hisilicon,hisi-femac-v2
This does not make sense. You cannot have two fallbacks. Old binding was
here confusing or even incorrect, so please fix this in the conversion.
It's fine to do the conversion and change, just explain what is done
here and why.
> +
> + reg:
> + items:
> + - description: The first region is the MAC core register base and size.
> + - description: The second region is the global MAC control register.
> +
> + interrupts:
> + maxItems: 1
> +
Best regards,
Krzysztof
new file mode 100644
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Fast Ethernet MAC controller
+
+maintainers:
+ - Yang Xiwen <forbidden405@foxmail.com>
+
+allOf:
+ - $ref: ethernet-controller.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - hisilicon,hi3516cv300-femac
+ - enum:
+ - hisilicon,hisi-femac-v1
+ - hisilicon,hisi-femac-v2
+
+ reg:
+ items:
+ - description: The first region is the MAC core register base and size.
+ - description: The second region is the global MAC control register.
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: MAC main clock
+
+ resets:
+ items:
+ - description: MAC reset signal
+ - description: PHY reset signal
+
+ reset-names:
+ items:
+ - const: mac
+ - const: phy
+
+ hisilicon,phy-reset-delays-us:
+ description: PHY reset timing requirement (in micro seconds).
+ The integrated PHY usually have a special reset timing sequence and must
+ interact with MAC controller to accomplish the entire reset procedure. So
+ these properties belong to MAC controller, not PHY.
+ items:
+ - description: pre-reset delay for PHY
+ - description: reset pulse for PHY
+ - description: post-reset delay for PHY
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - resets
+ - reset-names
+ - phy-mode
+ - phy-handle
+ - hisilicon,phy-reset-delays-us
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@10090000 {
+ compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac-v2";
+ reg = <0x10090000 0x1000>, <0x10091300 0x200>;
+ interrupts = <12>;
+ clocks = <&clk_femac>;
+ resets = <&crg 0xec 0>, <&crg 0xec 3>;
+ reset-names = "mac", "phy";
+ mac-address = [00 00 00 00 00 00];
+ phy-mode = "mii";
+ phy-handle = <&fephy>;
+ hisilicon,phy-reset-delays-us = <10000 20000 20000>;
+ };
deleted file mode 100644
@@ -1,41 +0,0 @@
-Hisilicon Fast Ethernet MAC controller
-
-Required properties:
-- compatible: should contain one of the following version strings:
- * "hisilicon,hisi-femac-v1"
- * "hisilicon,hisi-femac-v2"
- and the soc string "hisilicon,hi3516cv300-femac".
-- reg: specifies base physical address(s) and size of the device registers.
- The first region is the MAC core register base and size.
- The second region is the global MAC control register.
-- interrupts: should contain the MAC interrupt.
-- clocks: A phandle to the MAC main clock.
-- resets: should contain the phandle to the MAC reset signal(required) and
- the PHY reset signal(optional).
-- reset-names: should contain the reset signal name "mac"(required)
- and "phy"(optional).
-- phy-mode: see ethernet.txt [1].
-- phy-handle: see ethernet.txt [1].
-- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given.
- The 1st cell is reset pre-delay in micro seconds.
- The 2nd cell is reset pulse in micro seconds.
- The 3rd cell is reset post-delay in micro seconds.
-
-The MAC address will be determined using the optional properties
-defined in ethernet.txt[1].
-
-[1] Documentation/devicetree/bindings/net/ethernet.txt
-
-Example:
- hisi_femac: ethernet@10090000 {
- compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2";
- reg = <0x10090000 0x1000>,<0x10091300 0x200>;
- interrupts = <12>;
- clocks = <&crg HI3518EV200_ETH_CLK>;
- resets = <&crg 0xec 0>,<&crg 0xec 3>;
- reset-names = "mac","phy";
- mac-address = [00 00 00 00 00 00];
- phy-mode = "mii";
- phy-handle = <&phy0>;
- hisilicon,phy-reset-delays-us = <10000 20000 20000>;
- };