diff mbox series

[03/16] KVM: x86: Define more SEV+ page fault error bits/flags for #NPF

Message ID 20240228024147.41573-4-seanjc@google.com
State New
Headers
Series KVM: x86/mmu: Page fault and MMIO cleanups |

Commit Message

Sean Christopherson Feb. 28, 2024, 2:41 a.m. UTC 
  Define more #NPF error code flags that are relevant to SEV+ (mostly SNP)
guests, as specified by the APM:

 * Bit 34 (ENC):   Set to 1 if the guest’s effective C-bit was 1, 0 otherwise.
 * Bit 35 (SIZEM): Set to 1 if the fault was caused by a size mismatch between
                   PVALIDATE or RMPADJUST and the RMP, 0 otherwise.
 * Bit 36 (VMPL):  Set to 1 if the fault was caused by a VMPL permission
                   check failure, 0 otherwise.
 * Bit 37 (SSS):   Set to VMPL permission mask SSS (bit 4) value if VmplSSS is
                   enabled.

Note, the APM is *extremely* misleading, and strongly implies that the
above flags can _only_ be set for #NPF exits from SNP guests.  That is a
lie, as bit 34 (C-bit=1, i.e. was encrypted) can be set when running _any_
flavor of SEV guest on SNP capable hardware.

Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/include/asm/kvm_host.h | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Dongli Zhang Feb. 28, 2024, 4:43 a.m. UTC | #1 
On 2/27/24 18:41, Sean Christopherson wrote:
> Define more #NPF error code flags that are relevant to SEV+ (mostly SNP)
> guests, as specified by the APM:
> 
>  * Bit 34 (ENC):   Set to 1 if the guest’s effective C-bit was 1, 0 otherwise.
>  * Bit 35 (SIZEM): Set to 1 if the fault was caused by a size mismatch between
>                    PVALIDATE or RMPADJUST and the RMP, 0 otherwise.
>  * Bit 36 (VMPL):  Set to 1 if the fault was caused by a VMPL permission
>                    check failure, 0 otherwise.
>  * Bit 37 (SSS):   Set to VMPL permission mask SSS (bit 4) value if VmplSSS is
>                    enabled.

The above bits 34-37 do not match with the bits 31,34-36 in the patch.

Dongli Zhang

> 
> Note, the APM is *extremely* misleading, and strongly implies that the
> above flags can _only_ be set for #NPF exits from SNP guests.  That is a
> lie, as bit 34 (C-bit=1, i.e. was encrypted) can be set when running _any_
> flavor of SEV guest on SNP capable hardware.
> 
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>  arch/x86/include/asm/kvm_host.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 88cc523bafa8..1e69743ef0fb 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -261,8 +261,12 @@ enum x86_intercept_stage;
>  #define PFERR_FETCH_MASK	BIT(4)
>  #define PFERR_PK_MASK		BIT(5)
>  #define PFERR_SGX_MASK		BIT(15)
> +#define PFERR_GUEST_RMP_MASK	BIT_ULL(31)
>  #define PFERR_GUEST_FINAL_MASK	BIT_ULL(32)
>  #define PFERR_GUEST_PAGE_MASK	BIT_ULL(33)
> +#define PFERR_GUEST_ENC_MASK	BIT_ULL(34)
> +#define PFERR_GUEST_SIZEM_MASK	BIT_ULL(35)
> +#define PFERR_GUEST_VMPL_MASK	BIT_ULL(36)
>  #define PFERR_IMPLICIT_ACCESS	BIT_ULL(48)
>  
>  #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK |	\
Sean Christopherson Feb. 28, 2024, 4:16 p.m. UTC | #2 
On Tue, Feb 27, 2024, Dongli Zhang wrote:
> 
> 
> On 2/27/24 18:41, Sean Christopherson wrote:
> > Define more #NPF error code flags that are relevant to SEV+ (mostly SNP)
> > guests, as specified by the APM:
> > 
> >  * Bit 34 (ENC):   Set to 1 if the guest’s effective C-bit was 1, 0 otherwise.
> >  * Bit 35 (SIZEM): Set to 1 if the fault was caused by a size mismatch between
> >                    PVALIDATE or RMPADJUST and the RMP, 0 otherwise.
> >  * Bit 36 (VMPL):  Set to 1 if the fault was caused by a VMPL permission
> >                    check failure, 0 otherwise.
> >  * Bit 37 (SSS):   Set to VMPL permission mask SSS (bit 4) value if VmplSSS is
> >                    enabled.
> 
> The above bits 34-37 do not match with the bits 31,34-36 in the patch.

Doh, good catch.  I copy+pasted this from the APM, but the RMP bit is defined
slightly earlier in the APM, and I missed SSS.  I'll fixup the changelog to talk
about RMO, and I think I'll add SSS in v2; at the very least, having the #define
will make it clear which bits are used.

Thanks!
diff mbox series

Patch

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 88cc523bafa8..1e69743ef0fb 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -261,8 +261,12 @@  enum x86_intercept_stage;
 #define PFERR_FETCH_MASK	BIT(4)
 #define PFERR_PK_MASK		BIT(5)
 #define PFERR_SGX_MASK		BIT(15)
+#define PFERR_GUEST_RMP_MASK	BIT_ULL(31)
 #define PFERR_GUEST_FINAL_MASK	BIT_ULL(32)
 #define PFERR_GUEST_PAGE_MASK	BIT_ULL(33)
+#define PFERR_GUEST_ENC_MASK	BIT_ULL(34)
+#define PFERR_GUEST_SIZEM_MASK	BIT_ULL(35)
+#define PFERR_GUEST_VMPL_MASK	BIT_ULL(36)
 #define PFERR_IMPLICIT_ACCESS	BIT_ULL(48)
 
 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK |	\