Message ID | 20240227003630.3634533-5-samuel.holland@sifive.com |
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State | New |
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Mon, 26 Feb 2024 16:36:37 -0800 (PST) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id z25-20020a631919000000b005dc85821c80sm4504117pgl.12.2024.02.26.16.36.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 16:36:37 -0800 (PST) From: Samuel Holland <samuel.holland@sifive.com> To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Samuel Holland <samuel.holland@sifive.com> Subject: [PATCH 4/4] riscv: Allow NOMMU kernels to run in S-mode Date: Mon, 26 Feb 2024 16:34:49 -0800 Message-ID: <20240227003630.3634533-5-samuel.holland@sifive.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227003630.3634533-1-samuel.holland@sifive.com> References: <20240227003630.3634533-1-samuel.holland@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1792010383613877243 X-GMAIL-MSGID: 1792010383613877243 |
Series |
riscv: 64-bit NOMMU fixes and enhancements
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Commit Message
Samuel Holland
Feb. 27, 2024, 12:34 a.m. UTC
For ease of testing, it is convenient to run NOMMU kernels in supervisor
mode. The only required change is to offset the kernel load address,
since the beginning of RAM is usually reserved for M-mode firmware.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---
arch/riscv/Kconfig | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
Comments
On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote: > For ease of testing, it is convenient to run NOMMU kernels in supervisor > mode. The only required change is to offset the kernel load address, > since the beginning of RAM is usually reserved for M-mode firmware. > > Signed-off-by: Samuel Holland <samuel.holland@sifive.com> > --- > > arch/riscv/Kconfig | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index ef53c00470d6..0dc09b2ac2f6 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -64,7 +64,7 @@ config RISCV > select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE > select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU > select BUILDTIME_TABLE_SORT if MMU > - select CLINT_TIMER if !MMU > + select CLINT_TIMER if RISCV_M_MODE > select CLONE_BACKWARDS > select COMMON_CLK > select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND > @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX > > # set if we run in machine mode, cleared if we run in supervisor mode > config RISCV_M_MODE > - bool > - default !MMU > + bool "Build a kernel that runs in machine mode" > + depends on !MMU > + default y > + help > + Select this option if you want to run the kernel in M-mode, > + without the assistance of any other firmware. > > # set if we are running in S-mode and can use SBI calls > config RISCV_SBI > @@ -238,8 +242,9 @@ config MMU > > config PAGE_OFFSET > hex > - default 0xC0000000 if 32BIT && MMU > - default 0x80000000 if !MMU > + default 0x80000000 if !MMU && RISCV_M_MODE > + default 0x80200000 if !MMU > + default 0xc0000000 if 32BIT > default 0xff60000000000000 if 64BIT The first default seen with a passing condition is the default chosen, right? Cheers, Conor.
Hi Conor, On 2024-02-27 6:24 AM, Conor Dooley wrote: > On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote: >> For ease of testing, it is convenient to run NOMMU kernels in supervisor >> mode. The only required change is to offset the kernel load address, >> since the beginning of RAM is usually reserved for M-mode firmware. >> >> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> >> --- >> >> arch/riscv/Kconfig | 15 ++++++++++----- >> 1 file changed, 10 insertions(+), 5 deletions(-) >> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig >> index ef53c00470d6..0dc09b2ac2f6 100644 >> --- a/arch/riscv/Kconfig >> +++ b/arch/riscv/Kconfig >> @@ -64,7 +64,7 @@ config RISCV >> select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE >> select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU >> select BUILDTIME_TABLE_SORT if MMU >> - select CLINT_TIMER if !MMU >> + select CLINT_TIMER if RISCV_M_MODE >> select CLONE_BACKWARDS >> select COMMON_CLK >> select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND >> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX >> >> # set if we run in machine mode, cleared if we run in supervisor mode >> config RISCV_M_MODE >> - bool >> - default !MMU >> + bool "Build a kernel that runs in machine mode" >> + depends on !MMU >> + default y >> + help >> + Select this option if you want to run the kernel in M-mode, >> + without the assistance of any other firmware. >> >> # set if we are running in S-mode and can use SBI calls >> config RISCV_SBI >> @@ -238,8 +242,9 @@ config MMU >> >> config PAGE_OFFSET >> hex >> - default 0xC0000000 if 32BIT && MMU >> - default 0x80000000 if !MMU >> + default 0x80000000 if !MMU && RISCV_M_MODE >> + default 0x80200000 if !MMU >> + default 0xc0000000 if 32BIT >> default 0xff60000000000000 if 64BIT > > The first default seen with a passing condition is the default chosen, > right? Yes, exactly. It's not required for the conditions to all be disjoint. Regards, Samuel
On Tue, Feb 27, 2024 at 01:02:11PM -0600, Samuel Holland wrote: > Hi Conor, > > On 2024-02-27 6:24 AM, Conor Dooley wrote: > > On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote: > >> For ease of testing, it is convenient to run NOMMU kernels in supervisor > >> mode. The only required change is to offset the kernel load address, > >> since the beginning of RAM is usually reserved for M-mode firmware. > >> > >> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> > >> --- > >> > >> arch/riscv/Kconfig | 15 ++++++++++----- > >> 1 file changed, 10 insertions(+), 5 deletions(-) > >> > >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > >> index ef53c00470d6..0dc09b2ac2f6 100644 > >> --- a/arch/riscv/Kconfig > >> +++ b/arch/riscv/Kconfig > >> @@ -64,7 +64,7 @@ config RISCV > >> select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE > >> select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU > >> select BUILDTIME_TABLE_SORT if MMU > >> - select CLINT_TIMER if !MMU > >> + select CLINT_TIMER if RISCV_M_MODE > >> select CLONE_BACKWARDS > >> select COMMON_CLK > >> select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND > >> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX > >> > >> # set if we run in machine mode, cleared if we run in supervisor mode > >> config RISCV_M_MODE > >> - bool > >> - default !MMU > >> + bool "Build a kernel that runs in machine mode" > >> + depends on !MMU > >> + default y > >> + help > >> + Select this option if you want to run the kernel in M-mode, > >> + without the assistance of any other firmware. > >> > >> # set if we are running in S-mode and can use SBI calls > >> config RISCV_SBI > >> @@ -238,8 +242,9 @@ config MMU > >> > >> config PAGE_OFFSET > >> hex > >> - default 0xC0000000 if 32BIT && MMU > >> - default 0x80000000 if !MMU > >> + default 0x80000000 if !MMU && RISCV_M_MODE > >> + default 0x80200000 if !MMU > >> + default 0xc0000000 if 32BIT > >> default 0xff60000000000000 if 64BIT > > > > The first default seen with a passing condition is the default chosen, > > right? > > Yes, exactly. It's not required for the conditions to all be disjoint. I had actually gone and checked was doing the right thing, but I didn't manage to convince myself that this was intended behaviour rather than an implementation detail. What I saw in the docs for default was: "If multiple default values are visible, only the first defined one is active" and I suppose "visible" is what is used to cover the if part. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ef53c00470d6..0dc09b2ac2f6 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -64,7 +64,7 @@ config RISCV select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU select BUILDTIME_TABLE_SORT if MMU - select CLINT_TIMER if !MMU + select CLINT_TIMER if RISCV_M_MODE select CLONE_BACKWARDS select COMMON_CLK select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX # set if we run in machine mode, cleared if we run in supervisor mode config RISCV_M_MODE - bool - default !MMU + bool "Build a kernel that runs in machine mode" + depends on !MMU + default y + help + Select this option if you want to run the kernel in M-mode, + without the assistance of any other firmware. # set if we are running in S-mode and can use SBI calls config RISCV_SBI @@ -238,8 +242,9 @@ config MMU config PAGE_OFFSET hex - default 0xC0000000 if 32BIT && MMU - default 0x80000000 if !MMU + default 0x80000000 if !MMU && RISCV_M_MODE + default 0x80200000 if !MMU + default 0xc0000000 if 32BIT default 0xff60000000000000 if 64BIT config KASAN_SHADOW_OFFSET