Message ID | 20240220-v6-8-topic-rk3568-vicap-v1-4-2680a1fa640b@wolfvision.net |
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State | New |
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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240220-v6-8-topic-rk3568-vicap-v1-4-2680a1fa640b@wolfvision.net> References: <20240220-v6-8-topic-rk3568-vicap-v1-0-2680a1fa640b@wolfvision.net> In-Reply-To: <20240220-v6-8-topic-rk3568-vicap-v1-0-2680a1fa640b@wolfvision.net> To: Mehdi Djait <mehdi.djait.k@gmail.com>, =?utf-8?q?Th=C3=A9o_Lebrun?= <theo.lebrun@bootlin.com>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Sakari Ailus <sakari.ailus@linux.intel.com> Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch <michael.riesch@wolfvision.net> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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Series |
media: rockchip: cif: add support for rk3568 vicap
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Commit Message
Michael Riesch
Feb. 20, 2024, 9:39 a.m. UTC
Move the documentation of clocks and resets to a allOf: structure in order
to allow for different variants of the IP block.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
.../bindings/media/rockchip,px30-vip.yaml | 58 ++++++++++++++--------
1 file changed, 37 insertions(+), 21 deletions(-)
Comments
Hey, On Tue, Feb 20, 2024 at 10:39:14AM +0100, Michael Riesch wrote: > Move the documentation of clocks and resets to a allOf: structure in order > to allow for different variants of the IP block. > > Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> > --- > .../bindings/media/rockchip,px30-vip.yaml | 58 ++++++++++++++-------- > 1 file changed, 37 insertions(+), 21 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > index 675a1ea47210..7168f166798c 100644 > --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > @@ -24,32 +24,16 @@ properties: > interrupts: > maxItems: 1 > > - clocks: > - items: > - - description: ACLK > - - description: HCLK > - - description: PCLK > - > - clock-names: > - items: > - - const: aclk > - - const: hclk > - - const: pclk > + clocks: true > + > + clock-names: true This is, unfortunately, not how we like multiple soc support to be handled. Instead, the widest constraints are added at the top level and constrained by the allOf. If none of the names etc are shared, at least the widest constraints for minItems and maxItems should be able to be here. That said, this patch should be squashed with the patch that actually adds the other device to the binding. Cheers, Conor. > > iommus: > maxItems: 1 > > - resets: > - items: > - - description: AXI > - - description: AHB > - - description: PCLK IN > + resets: true > > - reset-names: > - items: > - - const: axi > - - const: ahb > - - const: pclkin > + reset-names: true > > power-domains: > maxItems: 1 > @@ -85,6 +69,38 @@ required: > - clocks > - ports > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: rockchip,px30-vip > + then: > + properties: > + clocks: > + items: > + - description: ACLK > + - description: HCLK > + - description: PCLK > + > + clock-names: > + items: > + - const: aclk > + - const: hclk > + - const: pclk > + > + resets: > + items: > + - description: AXI > + - description: AHB > + - description: PCLK IN > + > + reset-names: > + items: > + - const: axi > + - const: ahb > + - const: pclkin > + > additionalProperties: false > > examples: > > -- > 2.30.2 >
On Fri, Feb 23, 2024 at 08:03:20AM +0100, Michael Riesch wrote: > Hi Conor, > > On 2/20/24 19:58, Conor Dooley wrote: > > Hey, > > > > On Tue, Feb 20, 2024 at 10:39:14AM +0100, Michael Riesch wrote: > >> Move the documentation of clocks and resets to a allOf: structure in order > >> to allow for different variants of the IP block. > >> > >> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> > >> --- > >> .../bindings/media/rockchip,px30-vip.yaml | 58 ++++++++++++++-------- > >> 1 file changed, 37 insertions(+), 21 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > >> index 675a1ea47210..7168f166798c 100644 > >> --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > >> +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml > >> @@ -24,32 +24,16 @@ properties: > >> interrupts: > >> maxItems: 1 > >> > >> - clocks: > >> - items: > >> - - description: ACLK > >> - - description: HCLK > >> - - description: PCLK > >> - > >> - clock-names: > >> - items: > >> - - const: aclk > >> - - const: hclk > >> - - const: pclk > >> + clocks: true > >> + > >> + clock-names: true > > > > This is, unfortunately, not how we like multiple soc support to be > > handled. Instead, the widest constraints are added at the top level > > and constrained by the allOf. If none of the names etc are shared, at > > least the widest constraints for minItems and maxItems should be able to > > be here. > > Just to make sure I got it right: > > clocks: > minItems: 3 > maxItems: 4 > items: > - const: aclk > - const: hclk If the names themselves are all different, I wouldn't bother with this, and just constrain the numbers at the top level. Otherwise ye, on the right track here.
diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml index 675a1ea47210..7168f166798c 100644 --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml @@ -24,32 +24,16 @@ properties: interrupts: maxItems: 1 - clocks: - items: - - description: ACLK - - description: HCLK - - description: PCLK - - clock-names: - items: - - const: aclk - - const: hclk - - const: pclk + clocks: true + + clock-names: true iommus: maxItems: 1 - resets: - items: - - description: AXI - - description: AHB - - description: PCLK IN + resets: true - reset-names: - items: - - const: axi - - const: ahb - - const: pclkin + reset-names: true power-domains: maxItems: 1 @@ -85,6 +69,38 @@ required: - clocks - ports +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,px30-vip + then: + properties: + clocks: + items: + - description: ACLK + - description: HCLK + - description: PCLK + + clock-names: + items: + - const: aclk + - const: hclk + - const: pclk + + resets: + items: + - description: AXI + - description: AHB + - description: PCLK IN + + reset-names: + items: + - const: axi + - const: ahb + - const: pclkin + additionalProperties: false examples: