diff mbox series

cxl/trace: Fix uncorrectable macro spelling

Message ID 20240221-fix-correctable-macro-v1-1-6e6ab8b8aa39@intel.com
State New
Headers
Series cxl/trace: Fix uncorrectable macro spelling |

Commit Message

Ira Weiny Feb. 22, 2024, 4:52 a.m. UTC 
  Uncorrectable is spelled with two r's.

Fix the macro spelling.

Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
 drivers/cxl/core/trace.h     | 4 ++--
 tools/testing/cxl/test/mem.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)


---
base-commit: a2cd3520e6085b0f9145d9c5e3d1bfa9cce4c3be
change-id: 20240102-fix-correctable-macro-2847ce932c9c

Best regards,

Comments

Dave Jiang Feb. 22, 2024, 6:28 p.m. UTC | #1 
On 2/21/24 9:52 PM, Ira Weiny wrote:
> Uncorrectable is spelled with two r's.
> 
> Fix the macro spelling.
> 
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>  drivers/cxl/core/trace.h     | 4 ++--
>  tools/testing/cxl/test/mem.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index bdf117a33744..577a01954f71 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -267,11 +267,11 @@ TRACE_EVENT(cxl_generic_event,
>   * General Media Event Record - GMER
>   * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
>   */
> -#define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT		BIT(0)
> +#define CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT		BIT(0)
>  #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT		BIT(1)
>  #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW		BIT(2)
>  #define show_event_desc_flags(flags)	__print_flags(flags, "|",		   \
> -	{ CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,		"UNCORRECTABLE_EVENT"	}, \
> +	{ CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,	"UNCORRECTABLE_EVENT"	}, \
>  	{ CXL_GMER_EVT_DESC_THRESHOLD_EVENT,		"THRESHOLD_EVENT"	}, \
>  	{ CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW,	"POISON_LIST_OVERFLOW"	}  \
>  )
> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> index 35ee41e435ab..c0c1e6b4db75 100644
> --- a/tools/testing/cxl/test/mem.c
> +++ b/tools/testing/cxl/test/mem.c
> @@ -380,7 +380,7 @@ struct cxl_test_gen_media gen_media = {
>  			.related_handle = cpu_to_le16(0),
>  		},
>  		.phys_addr = cpu_to_le64(0x2000),
> -		.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
> +		.descriptor = CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,
>  		.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
>  		.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
>  		/* .validity_flags = <set below> */
> 
> ---
> base-commit: a2cd3520e6085b0f9145d9c5e3d1bfa9cce4c3be
> change-id: 20240102-fix-correctable-macro-2847ce932c9c
> 
> Best regards,
fan Feb. 22, 2024, 6:52 p.m. UTC | #2 
On Wed, Feb 21, 2024 at 08:52:28PM -0800, Ira Weiny wrote:
> Uncorrectable is spelled with two r's.
> 
> Fix the macro spelling.
> 
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> ---

Reviewed-by: Fan Ni <fan.ni@samsung.com>

>  drivers/cxl/core/trace.h     | 4 ++--
>  tools/testing/cxl/test/mem.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index bdf117a33744..577a01954f71 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -267,11 +267,11 @@ TRACE_EVENT(cxl_generic_event,
>   * General Media Event Record - GMER
>   * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
>   */
> -#define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT		BIT(0)
> +#define CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT		BIT(0)
>  #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT		BIT(1)
>  #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW		BIT(2)
>  #define show_event_desc_flags(flags)	__print_flags(flags, "|",		   \
> -	{ CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,		"UNCORRECTABLE_EVENT"	}, \
> +	{ CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,	"UNCORRECTABLE_EVENT"	}, \
>  	{ CXL_GMER_EVT_DESC_THRESHOLD_EVENT,		"THRESHOLD_EVENT"	}, \
>  	{ CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW,	"POISON_LIST_OVERFLOW"	}  \
>  )
> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> index 35ee41e435ab..c0c1e6b4db75 100644
> --- a/tools/testing/cxl/test/mem.c
> +++ b/tools/testing/cxl/test/mem.c
> @@ -380,7 +380,7 @@ struct cxl_test_gen_media gen_media = {
>  			.related_handle = cpu_to_le16(0),
>  		},
>  		.phys_addr = cpu_to_le64(0x2000),
> -		.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
> +		.descriptor = CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,
>  		.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
>  		.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
>  		/* .validity_flags = <set below> */
> 
> ---
> base-commit: a2cd3520e6085b0f9145d9c5e3d1bfa9cce4c3be
> change-id: 20240102-fix-correctable-macro-2847ce932c9c
> 
> Best regards,
> -- 
> Ira Weiny <ira.weiny@intel.com>
>
diff mbox series

Patch

diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index bdf117a33744..577a01954f71 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -267,11 +267,11 @@  TRACE_EVENT(cxl_generic_event,
  * General Media Event Record - GMER
  * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
  */
-#define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT		BIT(0)
+#define CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT		BIT(0)
 #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT		BIT(1)
 #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW		BIT(2)
 #define show_event_desc_flags(flags)	__print_flags(flags, "|",		   \
-	{ CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,		"UNCORRECTABLE_EVENT"	}, \
+	{ CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,	"UNCORRECTABLE_EVENT"	}, \
 	{ CXL_GMER_EVT_DESC_THRESHOLD_EVENT,		"THRESHOLD_EVENT"	}, \
 	{ CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW,	"POISON_LIST_OVERFLOW"	}  \
 )
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
index 35ee41e435ab..c0c1e6b4db75 100644
--- a/tools/testing/cxl/test/mem.c
+++ b/tools/testing/cxl/test/mem.c
@@ -380,7 +380,7 @@  struct cxl_test_gen_media gen_media = {
 			.related_handle = cpu_to_le16(0),
 		},
 		.phys_addr = cpu_to_le64(0x2000),
-		.descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
+		.descriptor = CXL_GMER_EVT_DESC_UNCORRECTABLE_EVENT,
 		.type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
 		.transaction_type = CXL_GMER_TRANS_HOST_WRITE,
 		/* .validity_flags = <set below> */